Having got fed up of my A4 not having a network connection, I decided to do something about it... by building it an Ethernet card to fit where the Econet module goes.
This is a work in progress. Updates will appear here as they happen. It's quite possible (indeed likely) that it won't move very fast at times, but I haven't completely abandoned it!
Thanks are due in particular to Matt Evans (for the original idea) and Terry Swanborough (for making the PCB).
29 September 2006
Various things in life have conspired to reduce to almost nil the time I have for developing software, so this project hasn't go very far. I've moved project hosting for CVS back to chiark from sourceforge, so here's the old sourceforge dci4driver website and CVSweb.
9 May 2004
My apologies for not updating more recently, but ethernet now works! (the horrid ping times are due to the amount of debugging coming out of the serial port). I've been able to ping, run ArcWeb to access Drobe and various other things. Unfortunately my A4 is now refusing to switch on, and I haven't been able to look at this for ages so haven't got anywhere in the last few months.
18 August 2003
The project has now been moved onto Sourceforge as dci4driver - this CVS will be updated rather than chiark's. I had a play with porting the Linux CS89x0 driver, but it looks like mangling it to use mbufs rather than sk_buffs will be somewhat complicated, and it's simpler to use FreeBSD.
9 August 2003
Got back from Greece yesterday. I didn't really get a chance to do anything at all. Anyway thanks to chiark's CVSWeb interface I've put the de600 and EtherY source CVS available for web access. I've registered EtherY with Sourceforge - need to wait until next week to see whether they agree to host it.
27 April 2003
I'm abroad with my A4, which is sick at the moment (the screen cables/LCD ASIC are unhappy and the external power supply is unwell - though it can limp along just about usably for short periods) - and I'm not likely to have much time to do development. So I'm afraid development on my part is probably going to stall until the beginning of July at the earliest.
In the meantime the release of the EtherY source makes life a lot easier - so if anyone is interested in driver development I'd be happy to help.
31 March 2003
The hardware works! I've spent the last week tweaking the PLD logic to get it working correctly - the current logic is here. The board got its first bodge wires when I had to fit the RJ45 connector with integrated magnetics and LEDs into the space for the connector without LEDs - needless to say the pin locations were incompatible. The connector having LEDs makes it a little too large to fit in the Econet bay properly, meaning the plastic cover has to stay a bit proud of the top of the A4. This is a pain - I might try to get a connector without LEDs to fit, but this isn't a priority.
The hardware successfully executes Cirrus' loopback test - this needs a 32 bit SharedCLibrary, CallASWI and SVCUtils running first. To turn on the hardware do SYS "Portable_Control",1,-2
Now there's the small (ahem) matter of the driver...
21 March 2003
Having to order the magnetics from the US, since the one I was expecting to use turned out to be incompatible with the CS8900. The rest of the board is done - I've programmed the PLD and plugged it into the newly resurrected A4 (more details to come). I can read the CS8900 but the upper 16 bit latch isn't working yet - this needs debugging.
Following a thread on comp.sys.acorn.programmer, I've got permission from Alan Williams to release his nonfunctional DE600 DCI4 driver source. Castle have also released their EtherY driver - more details can be found on Drobe.
3 March 2003
The hardware's almost there! The RJ45 socket and magnetics aren't soldered in in that image - I was just testing their positioning. The RJ45 fits perfectly into the space for a connector on the cover. After soldering the PLD in the wrong way round (doh!), I've decided a socket would be a good idea so I'll have to get some which will hold things up for a few days. All the hard surface mount stuff apart from the socket is done and looks OK.
19 January 2003
The boards have arrived! Now all I need to do is find the time to build them up!.
16 December 2002
Just noticed EDTP who sell cheap development boards. Their CS8900 board is $40 - probably cheaper than trying to build my card from scratch if you don't need it to fit in an A4 - these look like they can be interfaced to a podule fairly easily. They also have an ASIX 100Mbps board at the same price. When I get my hardware up and running, it should be possible to use on of these boards on a podule instead.
7 December 2002
I have a moment. Yay! (see the previous entry). Here are the design files for the issue 1 board:
- PDF: schematic (633K), PCB overview (283K), component placement (56K), top side (61K), bottom side (51K).
- Eagle design files, libraries and Gerbers: Zipped (183K). Includes libraries for Acorn podule bus, A4 Econet slot, CS8900, 74HC646 and ispLSI2032.
- Eagle output (all text files): Bill of Materials, netlist, pinlist, Eagle NetScript. (Added 2 June 2008)
15 November 2002
All the components have arrived, and I've given the boards to Terry Swanbrough to be built (many thanks for this service Terry!). This means the PCB has (finally!) been frozen - when I get a moment I'll get everything into an uploadable form and put it here.
20 October 2002
I spoke to the nice rep from Unique Memec the other day - apparently my CS8900 samples are on their way across the Atlantic, and will be here in about a week. Most other other components have come - I just need to order the 74HC646 and Lattice PLD (prices don't look too good for the latter in PLCC, but I'll see what Silicon Concepts can do).
The A4 is also a lot happier - I've swapped the switching regulator board with my newly acquired Triumph Alder Walkstation (the 386SX20 the A4 was based on, which shares the same case, keyboard, floppy drive, power supply and screen assemblies). The machine now works from the mains, although it refuses to talk to any of my batteries - another little thing to fix sometime. I'm also having a play with some of the <plug> replacement A4 LCD panels I'm selling </plug> - to see if I can drive it outside the A4.
3 October 2002
The design is finished - however I'm awaiting components (notably the CS8900 which should take 2-3 weeks) before getting the board done, just in case supply problems mean I have to substitute components. In the meantime, here are the schematic, the PCB (PNG image for the moment, as there's no point producing Gerbers until I've checked it), the components list, and a first stab at the CPLD logic (in ABEL HDL, as yet untested). I came to the conclusion that there was no way I was going to be able to fit a podule connector and flash plus the A4 board into the 4"x3" allowed by the freeware version of Eagle, so the board will need a reroute to allow this. An (unchecked) schematic of the podule version is here.
The A4 still remains under the surgeon's knife, but I hope to be able to do something about this in the next few days...
I also installed the free Lattice ispLEVER PLD tools on my Win95 box. After the 155MB (!) download (16 hours by modem!), and an age installing them over Samba to my RISC PC's HD, I find they need Win98 and 4x as much RAM is it has :-(. They don't seem to be happy under Wine either - so I've got rid of them, and gone back to the Win3.1 tools, which work and are 10x smaller! When I'm done, I'll hopefully supply something that can be downloaded using just a RISC OS box, so the tools won't be necessary.
22 September 2002
Alas my A4's internal power supply is a bit poorly at the moment, so my machine is somewhat non-functional. First step is to fix the A4 so I have something to prototype with before I continue with the design - if anyone wants the PCB files in the meantime, let me know.
14 September 2002
Finished routing the A4 bit of the card - an image of the PCB is available in PNG format, whilst the schematic has been updated. I haven't finished with the PCB (so no Gerber plots etc here yet), as I'm trying to make it also accomodate hardware to fit in a podule and/or netslot, plus flash - but the Freeware version of Eagle is restricted to half Eurocard, so space is a bit tight.
8 September 2002
Spent a bit of time yesterday entering the schematic into my PCB package (Eagle for Linux/x86, which I'm using in its Freeware form - whilst I'd love to use a RISC OS package, RiscPCB doesn't seem up to coping with lots of surface mount devices without pain and the open source Linux packages aren't much better). I haven't done anything more than put the board in the autorouter and hit go yet (it managed 70% routing, some a little mad), but the schematic output is available in PDF format, somewhat neater than the one below. Other than the inbuilt Electrical Rules Check, I haven't yet checked it's correct, so there may be errors.
2 September 2002
I've been having a think about how easy this is likely to be to hand solder. The CS8900's TQFP100 package has pins at 0.5mm pitch, each pin being 0.22mm wide. (picture - for scale, the spacing of the holes on the right hand side is 2.54mm). I've done 0.3mm pins at 0.65mm pitch on my SuperIO board (picture), but that was difficult. OK, so this case would involve soldering to a PCB, rather than soldering wires to each pin, but I'm still not overly confident of this. The above board (from embeddedethernet.com) comes with hand soldering instructions, but I'm skeptical.
Alternatives:
Use the RTL8019AS from Realtek. This is in a nicer QFP100 package (same as the SuperIO board). This is an NE2000 clone, which makes the software a bit more tricky (and apparently it has bugs in it), but not impossible. The datasheet is available, and there are a number of embedded designs (including some tips for design). Also, unlike on the CS8900, 8 bit mode works on this device, so it saves a latch from the circuit below. Sourcing these chips remains to be seen.
Stick with the Cirrus chips (either the CS8900 or its sister CS8920), and get someone to mount the chip onto the PCB. This saves having to worry about the surface mounting, but with the software benefits of having a Cirrus chip.
I'm exploring both at the moment.
17 August 2002
More scanner abuse... To give others an idea of what I'm aiming for, I'm scanned the A4 econet card. Unfortunately my scanner crashes halfway through colour scans (well, I did save it from the skip...), so it's missed the edge of the card, but you should get the idea.
16 August 2002
The distributor for the CS8900 says they will sell them a minimum of 6 at a time, for £10 plus VAT and postage each. I've accounted for 4 of them now, so does anyone want some more?
Some more details on variations on the schematics:
- The EEPROM (to hold the card's MAC address, and config information for the CS8900) is optional. It's useful because otherwise the driver needs to tell the card it's MAC address, and it's harder to keep this unique if it has to be encoded into the software.
The CS8900 is run in 16 bit mode. Whilst it does have an 8 bit mode, the documentation says interrrupts don't work in 8 bit mode, which leaving a driver to poll the device - a performance hit. The 74HC646 bidirectional latch performs latching of data for the top 8 bits of the 16 bit data bus. The addressing of the device and latch is slightly cunning to optimally use the ARM instruction set.
The address map looks like:
Address from base Device 0 CS8900 location 0 4 Latch 8 CS8900 location 1 12 Latch etc which means that if
r0contains the bottom 8 bits andr1the top 8 bits of a word to read/write, to read/write the register pointed to byr2can be done by:Write:
ADD r2,r2,#8 STMDB r2,{r0,r1}Read:
LDMIA r2,{r0,r1}which is quicker than two LDRBs (at least on the A4). If the board is connected to a 16 bit machine, the 74hc646 can be omitted (or disabled in the PLD), and the upper 8 bits of the data bus connected directly to the CS8900.
14 August 2002
Finally got around to sketching out a circuit for the A4 ethernet card, using a Cirrus Logic CS8900A. This can be found here. Also designed an adaptor to put this on a podule (for testing and/or Bush STB purposes), schematic is here. This can be made on a detachable section of PCB so the same PCB should serve both purposes.
Use of a Lattice Semi ispLSI2032E programmable logic device is purely because I have a programmer and Lattice were nice to me about tools. RISC OS programming software is available. They're also fairly cheap (£3ish), save board space by reducing glue logic, and mean the design can be tweaked after construction (A4/podule designs will need a slight reprogram). Allocation of I/Os and possible swapping of ports on buffers will be decided by the PCB is designed.
This is covered by a modified version of the LART licence.
Page by Theo Markettos (email at theo [at@] markettos.org.uk), last modified 2008-06-02
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