digispark-with-cable.scad

   1 // -*- C -*-
   2
   3 include <utils.scad>
   4
   5 //tongue_w = 11.92 + 0.4;
   6
   7 usb_w = 12.01 - 0.3;
   8 usb_wall_w = 0.75 - 0.1;
   9 usb_tongue_d = 8.97 - 0.2;
  10 usb_wall_h = 4.54 - 2.04;
  11 usb_ceil_th = 0.125;
  12
  13 side_wall_th = 1.5;
  14
  15 board_l = 17.56 + 0.2;
  16 board_w = 19.14 + 0.2;
  17 board_th = 1.92 + 0.1;
  18
  19 sw_to_edge = board_w/2 + 0.1;
  20
  21 small_walls = [
  22                [ [0, 0], [-sw_to_edge, -1.0] ],
  23                [ [sw_to_edge-4.5, -4.5], [sw_to_edge, -5.7] ],
  24                [ [3.0, -11.72] ,[sw_to_edge, -13.38] ],
  25                [ [-sw_to_edge+3.85, -14.90], [sw_to_edge, -13.38] ],
  26                ];
  27
  28 module BothSides(){
  29   for (m=[0,1]) {
  30     mirror([m,0]) {
  31       children();
  32     }
  33   }
  34 }
  35 module TopSmallWallsPlan() {
  36   for (m=[0,1]) {
  37     mirror([m,0]) {
  38       rectfromto([ -usb_w/2,              -0.01        ],
  39                  [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
  40     }
  41   }
  42   for (w=small_walls) {
  43     rectfromto(w[0], w[1]);
  44   }
  45 }
  46 module TopCeilPlan() {
  47   BothSides(){
  48     rectfromto([ -usb_w/2,              -0.01        ],
  49                [ 0.1,                   usb_tongue_d ]);
  50     rectfromto([ -board_w/2 - side_wall_th, 0            ],
  51                [ 0.1,                       -board_l     ]);
  52   }
  53 }
  54 module TopMainWallsPlan() {
  55   BothSides(){
  56     rectfromto([ -board_w/2 - side_wall_th, 0            ],
  57                [ -board_w/2,                -board_l     ]);
  58   }
  59 }
  60
  61 module Top(){
  62   linextr(0, usb_wall_h)
  63     TopSmallWallsPlan();
  64   linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
  65     TopCeilPlan();
  66   linextr(-board_th, usb_wall_h)
  67     TopMainWallsPlan();
  68 }
  69
  70 Top();