chiark - git - mdw - ssr/blob - StraySrc/Libraries/Core/s/rdump

   1 ;
   2 ; rdump.s
   3 ;
   4 ; Displays a register dump (sends it to VDUStream)
   5 ;
   6 ; © 1994-1998 Straylight
   7 ;
   8
   9 ;----- Licensing note -------------------------------------------------------
  10 ;
  11 ; This file is part of Straylight's core libraries (corelib)
  12 ;
  13 ; Corelib is free software; you can redistribute it and/or modify
  14 ; it under the terms of the GNU General Public License as published by
  15 ; the Free Software Foundation; either version 2, or (at your option)
  16 ; any later version.
  17 ;
  18 ; Corelib is distributed in the hope that it will be useful,
  19 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 ; GNU General Public License for more details.
  22 ;
  23 ; You should have received a copy of the GNU General Public License
  24 ; along with Corelib.  If not, write to the Free Software Foundation,
  25 ; 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26
  27 ;----- Standard header ------------------------------------------------------
  28
  29                 GET     libs:header
  30                 GET     libs:swis
  31
  32 ;----- Main code ------------------------------------------------------------
  33
  34                 AREA    |Debug$$Code|,CODE,READONLY
  35
  36 ; --- stream_regDump ---
  37 ;
  38 ; On entry:     R0 == pointer to saved R0-R15
  39 ;               R13 == pointer to full descending stack
  40 ;
  41 ; On exit:      R0-R14 corrupted
  42 ;
  43 ; Use:          Displays a register dump.
  44
  45                 EXPORT  stream_regDump
  46 stream_regDump  ROUT
  47
  48                 STMFD   R13!,{R14}              ;Save the link register
  49
  50                 ; --- Start the main display loop ---
  51
  52                 MOV     R12,R0                  ;Keep pointer to dump block
  53                 ADR     R11,stream__regNames    ;Point to register name tbl
  54                 MOV     R10,#0                  ;Which register we're on
  55
  56                 ; --- Display a register ---
  57
  58 00              ADD     R0,R11,R10,LSL #2       ;Point to the string
  59                 SWI     Stream_Write0           ;Display register name
  60                 SWI     Stream_WriteS           ;Display immediate string
  61                 DCB     " == &",0               ;A separater string
  62                 LDR     R0,[R12,R10,LSL #2]     ;Load the register value
  63                 SWI     Stream_WriteH32         ;Display register value
  64                 SWI     Stream_WriteS           ;Display more immediate
  65                 DCB     "   ",0                 ;Just some spaces
  66                 ADD     R10,R10,#1              ;Increment register count
  67                 TST     R10,#3                  ;Now a multiple of 4?
  68                 SWIEQ   Stream_NewLine          ;Yes -- new line then
  69                 CMP     R10,#16                 ;Finished all registers?
  70                 BLT     %00stream_regDump       ;No -- do some more then
  71
  72                 ; --- Now display R14 and R15 with PSR bits testually ---
  73
  74                 SWI     Stream_NewLine          ;Another newline
  75                 SWI     Stream_WriteS           ;Display immediate stuff
  76                 DCB     "R14 == &",0
  77                 LDR     R9,[R12,#14*4]          ;Load the R14 value
  78                 BL      stream__psr             ;Display all the PSR bits
  79                 SWI     Stream_NewLine          ;Another newline
  80                 SWI     Stream_WriteS           ;Display immediate stuff
  81                 DCB     " PC == &",0
  82                 LDR     R9,[R12,#15*4]          ;Load the PC value
  83                 BL      stream__psr             ;Display all the PSR bits
  84                 SWI     Stream_NewLine          ;Another newline
  85                 SWI     Stream_NewLine          ;And one more for luck
  86                 LDMFD   R13!,{PC}^              ;Return to caller
  87
  88 stream__regNames
  89                 DCB     " R0",0
  90                 DCB     " R1",0
  91                 DCB     " R2",0
  92                 DCB     " R3",0
  93                 DCB     " R4",0
  94                 DCB     " R5",0
  95                 DCB     " R6",0
  96                 DCB     " R7",0
  97                 DCB     " R8",0
  98                 DCB     " R9",0
  99                 DCB     "R10",0
 100                 DCB     "R11",0
 101                 DCB     "R12",0
 102                 DCB     "R13",0
 103                 DCB     "R14",0
 104                 DCB     " PC",0
 105
 106 ; --- stream__psr ---
 107 ;
 108 ; On entry:     R9 == value to display
 109 ;
 110 ; On exit:      R0-R12 corrupted, maybe
 111 ;
 112 ; Use:          Displays R9 with PSR bits stripped away, and then with
 113 ;               all the PSR bits described too.
 114
 115 stream__psr     ROUT
 116
 117                 STMFD   R13!,{R14}              ;Save the link register
 118                 BIC     R0,R9,#&FC000003        ;Get the PC bits only
 119                 SWI     Stream_WriteH32         ;Display them in hex
 120
 121                 SWI     Stream_WriteS           ;Some more spaces
 122                 DCB     ", flags == ",0
 123                 MOV     R0,#'N'                 ;First do the `N' flag
 124                 TST     R9,#N_flag              ;Is it set
 125                 ORREQ   R0,R0,#&20              ;No -- force to lower case
 126                 SWI     Stream_WriteT8          ;Display the character
 127                 MOV     R0,#'Z'                 ;First do the `N' flag
 128                 TST     R9,#Z_flag              ;Is it set
 129                 ORREQ   R0,R0,#&20              ;No -- force to lower case
 130                 SWI     Stream_WriteT8          ;Display the character
 131                 MOV     R0,#'C'                 ;First do the `N' flag
 132                 TST     R9,#C_flag              ;Is it set
 133                 ORREQ   R0,R0,#&20              ;No -- force to lower case
 134                 SWI     Stream_WriteT8          ;Display the character
 135                 MOV     R0,#'V'                 ;First do the `N' flag
 136                 TST     R9,#V_flag              ;Is it set
 137                 ORREQ   R0,R0,#&20              ;No -- force to lower case
 138                 SWI     Stream_WriteT8          ;Display the character
 139
 140                 SWI     Stream_WriteS           ;Yet more stuff
 141                 DCB     ", mode == ",0
 142                 ADR     R0,stream__modes        ;Point to the mode strings
 143                 AND     R14,R9,#3               ;Get the mode bits
 144                 ADD     R0,R0,R14,LSL #2        ;Point to the correct string
 145                 SWI     Stream_Write0           ;Display the mode setting
 146
 147                 TST     R9,#IRQ_disable         ;Is the IRQ bit on or off?
 148                 ADREQ   R0,stream__irqOn        ;If off, point to message
 149                 SWIEQ   Stream_Write0           ;And display the string
 150                 TST     R9,#FIQ_disable         ;Is the FIQ bit on or off?
 151                 ADREQ   R0,stream__fiqOn        ;If off, point to message
 152                 SWIEQ   Stream_Write0           ;And display the string
 153                 LDMFD   R13!,{PC}^              ;Return to caller
 154
 155 stream__modes   DCB     "USR",0
 156                 DCB     "FIQ",0
 157                 DCB     "IRQ",0
 158                 DCB     "SVC",0
 159
 160 stream__irqOn   DCB     ", IRQ",0
 161 stream__fiqOn   DCB     ", FIQ",0
 162
 163 ;----- That's all, folks ----------------------------------------------------
 164
 165                 END