base/dispatch.[ch]: Detect availability of the x86 `RDRAND' instruction.

diff --git a/base/dispatch.c b/base/dispatch.c
index b2a032e543c95fed765f0b6f411c98957a56ef0f..51619d5098679b3e7826bea6e39b8e2c565209ca 100644 (file)
--- a/base/dispatch.c
+++ b/base/dispatch.c
@@ -47,6 +47,7 @@
 #  define CPUID1D_SSE2 (1u << 26)
 #  define CPUID1D_FXSR (1u << 24)
 #  define CPUID1C_AESNI (1u << 25)
 #  define CPUID1D_SSE2 (1u << 26)
 #  define CPUID1D_FXSR (1u << 24)
 #  define CPUID1C_AESNI (1u << 25)

+#  define CPUID1C_RDRAND (1u << 30)

 
 struct cpuid { unsigned a, b, c, d; };
 
 
 struct cpuid { unsigned a, b, c, d; };
 


@@ -516,6 +517,8 @@ int cpu_feature_p(int feat)
     CASE_CPUFEAT(X86_AESNI, "x86:aesni",
                 xmm_registers_available_p() &&
                 cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI));
     CASE_CPUFEAT(X86_AESNI, "x86:aesni",
                 xmm_registers_available_p() &&
                 cpuid_features_p(CPUID1D_SSE2, CPUID1C_AESNI));

+    CASE_CPUFEAT(X86_RDRAND, "x86:rdrand",
+                cpuid_features_p(0, CPUID1C_RDRAND));

 #endif
 #ifdef CAPMAP
 #  define FEATP__CASE(feat, tok)                                       \
 #endif
 #ifdef CAPMAP
 #  define FEATP__CASE(feat, tok)                                       \

diff --git a/base/dispatch.h b/base/dispatch.h
index 1e463bdc36b32360e9b6a3e8af55809b06c6c341..1983a5a491b36cc3b691e8373e4bec7f76eecee8 100644 (file)
--- a/base/dispatch.h
+++ b/base/dispatch.h
@@ -179,7 +179,8 @@ enum {
   CPUFEAT_ARM_VFP,                     /* VFP floating-point (v3 or v4) */
   CPUFEAT_ARM_NEON,                    /* Advanced SIMD (v1 or v2) */
   CPUFEAT_ARM_V4,                      /* VFPv4 and/or SIMD v2 */
   CPUFEAT_ARM_VFP,                     /* VFP floating-point (v3 or v4) */
   CPUFEAT_ARM_NEON,                    /* Advanced SIMD (v1 or v2) */
   CPUFEAT_ARM_V4,                      /* VFPv4 and/or SIMD v2 */

-  CPUFEAT_ARM_D32                      /* 32 double registers, not 16 */
+  CPUFEAT_ARM_D32,                     /* 32 double registers, not 16 */
+  CPUFEAT_X86_RDRAND                   /* Built-in entropy source */

 };
 
 extern int cpu_feature_p(int /*feat*/);
 };
 
 extern int cpu_feature_p(int /*feat*/);