base/dispatch-x86ish.S (dispatch_x86ish_cpuid): Skip `EFLAGS_ID' dance on AMD64.

The 64-bit instruction set postdates the `cpuid' instruction.

diff --git a/base/dispatch-x86ish.S b/base/dispatch-x86ish.S
index 8a4c7b2e58130ab4a41bcb3ebb78ab900aa16a9b..3a14c3962b861ad5888b89c1be41f926c6fba218 100644 (file)
--- a/base/dispatch-x86ish.S
+++ b/base/dispatch-x86ish.S
@@ -67,7 +67,9 @@ FUNC(dispatch_x86ish_cpuid)
   endprologue
 
        // First, check that this is even a thing, using the complicated
   endprologue
 
        // First, check that this is even a thing, using the complicated

-       // dance with the flags register.
+       // dance with the flags register.  This is unnecessary on AMD64,
+       // which postdates the introduction of `cpuid'.
+#if CPUFAM_X86

        pushf
        pop     DX                      // current flags in d
 
        pushf
        pop     DX                      // current flags in d
 


@@ -86,6 +88,7 @@ FUNC(dispatch_x86ish_cpuid)
        pop     DX
        test    edx, EFLAGS_ID
        jnz     8f
        pop     DX
        test    edx, EFLAGS_ID
        jnz     8f

+#endif

 
        // OK, that seemed to work.
        cpuid
 
        // OK, that seemed to work.
        cpuid


@@ -108,6 +111,7 @@ FUNC(dispatch_x86ish_cpuid)
        ret
 
        // Failed.
        ret
 
        // Failed.

+#if CPUFAM_X86

 8:     xor     eax, eax
        mov     [OUT + 0], eax
        mov     [OUT + 4], eax
 8:     xor     eax, eax
        mov     [OUT + 0], eax
        mov     [OUT + 4], eax


@@ -115,6 +119,7 @@ FUNC(dispatch_x86ish_cpuid)
        mov     [OUT + 12], eax
        mov     eax, -1
        jmp     9b
        mov     [OUT + 12], eax
        mov     eax, -1
        jmp     9b

+#endif

 ENDFUNC
 
 ///--------------------------------------------------------------------------
 ENDFUNC
 
 ///--------------------------------------------------------------------------