chiark / gitweb /
digispark-with-cable: wip progress
[reprap-play.git] / digispark-with-cable.scad
1 // -*- C -*-
2
3 include <utils.scad>
4
5 //tongue_w = 11.92 + 0.4;
6
7 usb_w = 12.01 + 0.19;
8 usb_wall_w = 0.51;
9 usb_tongue_d = 8.97 - 0.2;
10 usb_tongue_w_slop = +0.5;
11 usb_wall_h = 4.54 - 2.04;
12 usb_ceil_th = 0.425;
13
14 side_wall_th = 1.5;
15
16 board_l = 17.56 + 0.2;
17 board_w = 19.14 + 0.2;
18 board_th = 1.92 + 0.1;
19
20 sw_to_edge = board_w/2 + 0.1;
21
22 front_wall_th = 0.75;
23 // egress_w = 8.0;
24
25 wall_y_min = -board_l - side_wall_th; // XXXX remove
26 main_y_min = -board_l - side_wall_th;
27 ceil_y_min = wall_y_min - 5;;
28
29 small_walls = [
30                [ [0, 0], [-sw_to_edge, -1.0] ],
31                [ [sw_to_edge-4.5, -4.5], [sw_to_edge, -5.7] ],
32 //             [ [3.0, -11.72],              [sw_to_edge, -13.38] ],
33                [ [-sw_to_edge+3.85, -14.90], [sw_to_edge, -13.38] ],
34                ];
35 chip_cutout = [[ -sw_to_edge + 4.20,    -3.75 ],
36                [ -sw_to_edge + 11.95,  -11.90 ]];
37
38 strain_w = 2.0 + 0.5;
39 strain_t = 1.0 + 0.5;
40 strain_pitch_across = 5;
41 strain_pitch_along = 10;
42 strain_groove_d = 2;
43 strain_groove_w = 3;
44
45 // calculated
46
47 strain_0_y_c = main_y_min - strain_w/2;
48 strain_1_y_c = strain_0_y_c - strain_pitch_along;
49 total_y_min = strain_1_y_c - strain_w/2 - side_wall_th;
50
51 module BothSides(){
52   for (m=[0,1]) {
53     mirror([m,0]) {
54       children();
55     }
56   }
57 }
58 module FrontWallsPlan(slop) {
59   BothSides(){
60     rectfromto([ -board_w/2 - side_wall_th,    0             ],
61                [ -usb_w/2 - slop,              front_wall_th ]);
62   }
63 }
64 module TopSmallWallsPlan() {
65   for (m=[0,1]) {
66     mirror([m,0]) {
67       rectfromto([ -usb_w/2,              -0.01        ],
68                  [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
69     }
70   }
71   FrontWallsPlan(0);
72   for (w=small_walls) {
73     rectfromto(w[0], w[1]);
74   }
75 }
76 module TopCeilPlan() {
77   difference(){
78     BothSides(){
79       rectfromto([ -usb_w/2,              -0.01        ],
80                  [ 0.1,                   usb_tongue_d ]);
81       rectfromto([ -board_w/2 - side_wall_th, 0            ],
82                  [ 0.1,                       ceil_y_min   ]);
83     }
84     rectfromto(chip_cutout[0], chip_cutout[1]);
85   }
86 }
87 module TopMainWallsPlan() {
88   BothSides(){
89     rectfromto([ -board_w/2 - side_wall_th, 0          ],
90                [ -board_w/2,                wall_y_min ]);
91   }
92   FrontWallsPlan(usb_tongue_w_slop);
93   rectfromto([ -board_w/2 - side_wall_th + 0, -      board_l   ],
94              [ +board_w/2 + side_wall_th,            total_y_min ]);
95 }
96
97 module Top(){ ////toplevel
98   difference(){
99     union(){
100       linextr(0, usb_wall_h)
101         TopSmallWallsPlan();
102       linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
103         TopCeilPlan();
104       linextr(-board_th, usb_wall_h)
105         TopMainWallsPlan();
106     }
107
108     for (y_c = [strain_0_y_c, strain_1_y_c]) {
109       for (x_c = [-1,+1] * strain_pitch_across/2) {
110         translate([x_c, y_c, 0])
111           linextr(-20, 20)
112           square([ strain_t, strain_w ], center=true);
113       }
114     }
115     linextr_y_xz(total_y_min-1, main_y_min)
116       translate([0, -board_th])
117       scale([1, strain_groove_d/strain_groove_w])
118       circle(strain_groove_w/2, $fn = 8);
119   }
120 }
121
122 module Bottom(){ ////toplevel
123 }