chiark / gitweb /
digispark-with-cable: wip
[reprap-play.git] / digispark-with-cable.scad
index 279df344ce3d0dc7fec089b8e648fa8c5c34c068..69a19e25e3f629eed4c87cc0e22e0bbd9a4cc50f 100644 (file)
@@ -12,23 +12,36 @@ usb_ceil_th = 0.125;
 
 side_wall_th = 1.5;
 
-board_l = 13.56 + 0.2;
+board_l = 17.56 + 0.2;
 board_w = 19.14 + 0.2;
+board_th = 1.92 + 0.1;
 
-module TopSmallWallsPlan() {
+sw_to_edge = board_w/2 + 0.1;
+
+small_walls = [
+              [ [0, 0], [-sw_to_edge, -1.0] ],
+              [ [sw_to_edge-4.5, -4.5], [sw_to_edge, -5.7] ],
+              [ [3.0, -11.72] ,[sw_to_edge, -13.38] ],
+              [ [-sw_to_edge+3.85, -14.90], [sw_to_edge, -13.38] ],
+              ];
+
+module BothSides(){
   for (m=[0,1]) {
     mirror([m,0]) {
-      rectfromto([ -usb_w/2,              -0.01        ],
-                [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
+      children();
     }
   }
 }
-module BothSides(){
+module TopSmallWallsPlan() {
   for (m=[0,1]) {
     mirror([m,0]) {
-      children();
+      rectfromto([ -usb_w/2,              -0.01        ],
+                [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
     }
   }
+  for (w=small_walls) {
+    rectfromto(w[0], w[1]);
+  }
 }
 module TopCeilPlan() {
   BothSides(){
@@ -39,7 +52,10 @@ module TopCeilPlan() {
   }
 }
 module TopMainWallsPlan() {
-  
+  BothSides(){
+    rectfromto([ -board_w/2 - side_wall_th, 0            ],
+              [ -board_w/2,                -board_l     ]);
+  }
 }
 
 module Top(){
@@ -47,6 +63,8 @@ module Top(){
     TopSmallWallsPlan();
   linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
     TopCeilPlan();
+  linextr(-board_th, usb_wall_h)
+    TopMainWallsPlan();
 }
 
 Top();