digispark-with-cable: wip progress

[reprap-play.git] / digispark-with-cable.scad

diff --git a/digispark-with-cable.scad b/digispark-with-cable.scad
index 07a28bd784e5040a2e381a0b75d32b3875924146..069c04bf1ae8ca2820a40a53e8f52eddece2e2cc 100644 (file)
--- a/digispark-with-cable.scad
+++ b/digispark-with-cable.scad
@@ -7,6 +7,7 @@ include <utils.scad>
 usb_w = 12.01 + 0.19;
 usb_wall_w = 0.51;
 usb_tongue_d = 8.97 - 0.2;
+usb_tongue_w_slop = +0.5;
 usb_wall_h = 4.54 - 2.04;
 usb_ceil_th = 0.425;
 
@@ -19,9 +20,10 @@ board_th = 1.92 + 0.1;
 sw_to_edge = board_w/2 + 0.1;
 
 front_wall_th = 0.75;
-egress_w = 8.0;
+// egress_w = 8.0;
 
-wall_y_min = -board_l - side_wall_th;;
+wall_y_min = -board_l - side_wall_th; // XXXX remove
+main_y_min = -board_l - side_wall_th;
 ceil_y_min = wall_y_min - 5;;
 
 small_walls = [
@@ -30,9 +32,20 @@ small_walls = [
 //            [ [3.0, -11.72],              [sw_to_edge, -13.38] ],
               [ [-sw_to_edge+3.85, -14.90], [sw_to_edge, -13.38] ],
               ];
-chip_cutout = [[ -sw_to_edge + 4.20,    -4.50 ],
+chip_cutout = [[ -sw_to_edge + 4.20,    -3.75 ],
               [ -sw_to_edge + 11.95,  -11.90 ]];
 
+strain_w = 2.0 + 0.5;
+strain_t = 1.0 + 0.5;
+strain_pitch_across = 5;
+strain_pitch_along = 10;
+
+// calculated
+
+strain_0_y_c = main_y_min - strain_w/2;
+strain_1_y_c = strain_0_y_c - strain_pitch_along;
+total_y_min = strain_1_y_c - strain_w/2 - side_wall_th;
+
 module BothSides(){
   for (m=[0,1]) {
     mirror([m,0]) {
@@ -40,6 +53,12 @@ module BothSides(){
     }
   }
 }
+module FrontWallsPlan(slop) {
+  BothSides(){
+    rectfromto([ -board_w/2 - side_wall_th,    0             ],
+               [ -usb_w/2 - slop,              front_wall_th ]);
+  }
+}
 module TopSmallWallsPlan() {
   for (m=[0,1]) {
     mirror([m,0]) {
@@ -47,6 +66,7 @@ module TopSmallWallsPlan() {
                 [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
     }
   }
+  FrontWallsPlan(0);
   for (w=small_walls) {
     rectfromto(w[0], w[1]);
   }
@@ -66,14 +86,13 @@ module TopMainWallsPlan() {
   BothSides(){
     rectfromto([ -board_w/2 - side_wall_th, 0          ],
               [ -board_w/2,                wall_y_min ]);
-    rectfromto([ -board_w/2 - side_wall_th, 0             ],
-               [ -usb_w/2,                  front_wall_th ]);
   }
-  rectfromto([ -board_w/2 - side_wall_th + egress_w, -board_l   ],
-            [ +board_w/2 + side_wall_th,            wall_y_min ]);
+  FrontWallsPlan(usb_tongue_w_slop);
+  rectfromto([ -board_w/2 - side_wall_th + 0, -      board_l   ],
+            [ +board_w/2 + side_wall_th,            total_y_min ]);
 }
 
-module Top(){
+module Top(){ ////toplevel
   linextr(0, usb_wall_h)
     TopSmallWallsPlan();
   linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
@@ -82,4 +101,5 @@ module Top(){
     TopMainWallsPlan();
 }
 
-Top();
+module Bottom(){ ////toplevel
+}