1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
13 include ../iwjpictest/clockvaries.inc
14 include variables+vars.inc
16 include program+clocks.inc
20 tickdiv_us equ tick_us * tickdiv
22 ;----------------------------------------------------------------------
23 ; Common conventions for function register notation:
28 ; STATUS Trashed Trashed
29 ; BSR Not used Not used
30 ; t,u,v Low ISR Low ISR
31 ; TBLPTR*,TABLAT Low ISR Low ISR
32 ; PROD* Low ISR Low ISR
33 ; FSR0 Low ISR Low ISR
34 ; PCLATU Always set to 0 Not used
35 ; PCLATH Low ISR Not used
36 ; t_dolocal Low ISR High ISR
37 ; FSR1 Low ISR High ISR (detect[1])
38 ; FSR2 High ISR (nmra[1]) High ISR (detect[1])
40 ; Main loop detection scan detection scan
41 ; High ISR NMRA output I2C service
42 ; Low ISRs everything else everything else
44 ; Trashed May be trashed by any routine anywhere. Saved
45 ; during every ISR entry/exit.
47 ; Low ISR May be used/trashed by any routine run in low-priority
48 ; interrupt, or any routine run during initialisation.
49 ; May therefore not be used in background loop with
50 ; interrupts enabled. May not be used by high-priority
51 ; ISR (unless explicitly saved, eg isrh_fsr0_{save,restore}).
53 ; High ISR May be used/trashed by any routine run in high-priority
54 ; interrupt, or any routine run during initialisation.
55 ; May therefore not be used elsewhere with interrupts
58 ; Only the routines specially noted as intended to
59 ; be called from the High ISR are safe.
62 ; Register is reserved for use by this subsystem, which
63 ; is allowed to expect the value to be preserved.
64 ; Anything else which uses it must save and restore (and
65 ; may also need to disable interrupts, depending on its
68 ; Not High May be used by any routine not running in high-priority
69 ; interrupt. Not saved by high-priority interrupt
70 ; entry/exit, so any high-priority interrupt routine which
71 ; uses this register must save and restore it.
73 ; A routine which is allowed to trash a register may document that it
74 ; saves that register for the benefit of its callers.
76 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
77 ; I2C response and detection code (detect.asm), after
78 ; detect_slave_init. Likewise FSR2 is reserved exclusively
79 ; for the NMRA output ISR after nmra_init.
81 ; General-purpose hardware allocation:
84 ; Timer 0 nmra Disabled
85 ; Timer 2 tick, int. low -
88 ; Timer 3 point fire timer point fire timer
91 ; (...) indicates that this is a projected use, NYI
93 ;----------------------------------------------------------------------
94 ; Conventional routine names:
96 ; <periph>_local_do Process a master-to-slave command to activate
97 ; a local peripheral, in High ISR. Also called
98 ; on master in Low ISR to activate its own
99 ; local peripherals. NB strange calling convention!
101 ; <periph>_local_init Initialises RAM tables for local peripheral
102 ; and arranges for pins to be set in appropriate
103 ; quiescent state. Configures pic built-in
106 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
108 ; command_<periph> Called when an appropriate message has been
109 ; received from the host.
111 ; <something>_intrl Low ISR service routine.
112 ; Checks for any relevant interrupt.
113 ; If not, just returns.
114 ; If found, services it and then does either
115 ; intrl_handled or intrl_handled_nostack
116 ; neither of which return; the latter is
117 ; faster but implies a promise
119 ;----------------------------------------------------------------------
125 ;----------------------------------------
126 ; For adding a byte to the debug buffer.
127 ; Not for use in High ISR. In all cases:
130 ; all others any preserved
134 Dv macro ; sorry, but assembler's dw directive isn't case-sensitive
136 ; W message byte preserved
142 Dl macro debug_literal_value
144 ; W any literal value as specified
146 mov_lw debug_literal_value
151 Df macro debug_register_file_address
153 ; W any value from specified memory location
155 mov_fw debug_register_file_address
161 Dl macro debug_literal_value
163 Df macro debug_register_file_address
167 ;----------------------------------------
168 ; For entering and leaving Low ISR, saving and restoring STATUS and W
169 ; See above under <something>_intrl, and {master,slave}_interrupt_low
171 enter_interrupt_low macro
172 mov_ff STATUS, isr_low_save_status
173 mov_wf isr_low_save_w
174 mov_ff STKPTR, isr_low_save_stkptr
177 intrh_fsr0_save macro
178 mov_ff FSR0L, isr_high_save_fsr0
179 mov_ff FSR0H, isr_high_save_fsr0+1
182 intrh_fsr0_restore macro
183 mov_ff isr_high_save_fsr0, FSR0L
184 mov_ff isr_high_save_fsr0+1, FSR0H
187 intrl_handled_core macro ; for internal use only
188 mov_fw isr_low_save_w
189 mov_ff isr_low_save_status, STATUS
193 intrl_handled_nostack macro
194 pop ; undo the `call' from the original ISR
199 goto intrl_handled_routine
202 ;----------------------------------------
203 ; For disabling all interrupts, to make a critical section:
204 ; (for use from main program and Low ISR only)
206 ; GIEH modified appropriately
207 ; everything else preserved
217 ;----------------------------------------
218 ; For the fix specified in the silicon errata:
219 ; silicon revision B4 issue 4
222 ; TABLAT any data from flash
223 ; TBLPTR* correct incremented/decremented
224 ; everything else any preserved
226 tblrd_postinc_fixup macro
231 tblrd_postdec_fixup macro
236 ;----------------------------------------
237 ; For setting up TBLPTR
239 load_tblptr macro value
243 ; W, STATUS any undefined
259 load_perpic_tblptr macro flash_map_base, perpic_entry_size
263 ; W, STATUS, PROD* any undefined
264 ; everything else any preserved
266 mov_lw perpic_entry_size
269 mov_lw flash_map_base & 0xff
273 mov_lw flash_map_base >> 8
277 clr_f TBLPTRU ; TBLPTR* -> our point data
280 ;----------------------------------------------------------------------
283 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
284 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
285 ; are equ'd for this.
290 p0_booster_shutdown equ 2b
291 p0_booster_overload equ 1b
292 p0_booster_userfault equ 0b
295 p0_rs232_fcout equ 5c
296 pall_perpicled equ 2d
297 pall_pt0reverse equ 7b
299 p0_booster_dirn equ 0c
300 p0_booster_pwm equ 1c
304 ; LAT* may be subject to read-modify-write, see below
305 ; TRIS* may be subject to read-modify-write, see below
306 ; PORT* may be read, see below
307 ; everything else untouched
309 ; LAT*<bit> TRIS*<bit> PORT*
310 ; pin_z untouched set untouched
311 ; pin_h set cleared untouched
312 ; pin_l cleared cleared untouched
313 ; pin_nz untouched cleared untouched
314 ; pin_vh set untouched untouched
315 ; pin_vl cleared untouched untouched
316 ; pin_ifh untouched untouched read
317 ; pin_ifl untouched untouched read
320 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
324 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
327 pin_znz macro pinspec
328 btg_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
332 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
336 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
339 pin_vhl macro pinspec
340 btg_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
353 pin_ifh macro pinspec
354 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
357 pin_ifl macro pinspec
358 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
361 pinlat_ifh macro pinspec
362 bt_f_if1 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
365 pinlat_ifl macro pinspec
366 bt_f_if0 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
369 ;----------------------------------------------------------------------