chiark / gitweb /
trains.git
2004-09-02 iantruncate points plug and trim layout by 25th
2004-09-02 ianswap plug and socket
2004-09-01 ianconnector INDIV0 diagram
2004-09-01 ianignore gerber outputs
2004-09-01 iandelete offboard silk from indiv0
2004-09-01 ianbefore adjust silk
2004-08-30 ianproper creation of oprints-l
2004-08-30 ianpcboprints makes oprints-l
2004-08-30 iando not clean pcb output postscript files
2004-08-30 iannow all a4
2004-08-30 iana3 handling improved
2004-08-30 iansmaller; passes nicely; is next draft
2004-08-30 ianfixes, routes nicely, before shrink manually again
2004-08-30 iansense8!
2004-08-30 iannicer printing arrangements
2004-08-29 iandetectors draft finished
2004-08-29 ianbefore resize
2004-08-29 ianbefore shift
2004-08-29 ianworking on routing
2004-08-29 ianreally routes but still no room for text
2004-08-29 ianroutes but text does not fit
2004-08-29 ianbefore much manual routing
2004-08-29 ianreversers draft finished
2004-08-29 ianbefore shrink
2004-08-29 ianmounting holes placed
2004-08-29 ianprint detectors too
2004-08-29 ianmounting holes
2004-08-29 ianworking on routing
2004-08-29 ianground and power routing
2004-08-28 ianpic senses done? wip
2004-08-28 iansense lines route wip
2004-08-28 ianrats nicely laid out etc except for pic pins
2004-08-28 ianbefore reorg sense
2004-08-28 ianredo layout placement wip
2004-08-28 ianbefore delete stuff for redo
2004-08-28 ianbefore move some rs*
2004-08-28 ianrasN
2004-08-28 ianmake more like detectors. wip. problem with netlist
2004-08-28 ianbefore c&p oc
2004-08-28 ianbefore c&p oc
2004-08-28 ianbefore turn brs
2004-08-28 ianrectifiers
2004-08-26 ianrename
2004-08-26 iangenerates detectors as well as reversers netlist
2004-08-26 ianclone and hack
2004-08-26 ianfit fab
2004-08-26 ianMakefile in oprint target; fit fab on
2004-08-26 ianmore printing
2004-08-26 ianautoroutes again
2004-08-26 ianstraighten silk texts
2004-08-26 ianlayer id texts
2004-08-26 ianswap bus <-> indiv1
2004-08-26 ianptd vertical mount
2004-08-26 ianindiv0-2 to indiv1-2 thick
2004-08-26 ianpc <-> pd
2004-08-26 ianpad/pin sizes
2004-08-26 ianprint => oprint for better completion
2004-08-25 ianhow to view .print-*.ps
2004-08-25 ianprint front back and assembly
2004-08-25 ianretile to fit on A4
2004-08-25 ianrerun with only selected sides
2004-08-25 iandrc errors ok even when rerouting; resave ?
2004-08-25 iandrc errors ok even when rerouting
2004-08-25 ianmanual fixup of drc errors
2004-08-25 ianwith drc errors and rcs id
2004-08-25 ianautorouter makes drc errors
2004-08-25 ianbefore change d25 again
2004-08-24 ianhelping autorouter
2004-08-24 ianbefore reorg d and manual stuff and...
2004-08-24 ianplacement work, mounting gaps
2004-08-24 ianpoints connector varied
2004-08-24 ianallow : stuff things : syntax
2004-08-24 iangenerate same netlist but split data from code
2004-08-24 ianfancier netlist generation
2004-08-23 ianwip nice
2004-08-23 ianfurtling seems ok
2004-08-23 ianafter fiddle manually
2004-08-23 ianbefore fiddle manually
2004-08-23 ianpoints
2004-08-23 ianmuch manual gnd/vcc routing
2004-08-22 ianpdw circuitry. need manual reverse0..5 routing
2004-08-22 ianwip routes
2004-08-22 ianlargely routes
2004-08-22 iannetlist loads ok but still everything wip
2004-08-22 ianreversers pcb and netlist wip - netlist still broken
2004-08-22 iansome shuffling - wip
2004-08-22 ianhas term0 connector
2004-08-21 ianreversers new connector wip
2004-08-21 ianturn real wip
2004-08-21 ianturn real wip
2004-08-21 ianignore reversers pcb stuff
2004-08-21 iandelete abortive pic element
2004-08-21 ianabortive pic element
2004-08-20 ianswap in and out for DEFG
2004-08-20 iandebugged. oc still weird
2004-08-20 ianflash-all really does flash RD7
2004-08-20 ianflash-all actually flashes RD7 too
2004-08-20 ianbugfixes
2004-08-14 iani/o copying ?
2004-08-12 iannew siggen
next