chiark / gitweb /
ian [Sun, 3 Oct 2004 16:06:20 +0000 (16:06 +0000)]
cut out redundant junk
ian [Sun, 3 Oct 2004 16:06:09 +0000 (16:06 +0000)]
move some .cvsignores from root to pcb
ian [Sun, 3 Oct 2004 16:05:49 +0000 (16:05 +0000)]
remove spurious our which causes warning
ceb [Sat, 2 Oct 2004 22:26:25 +0000 (22:26 +0000)]
Random test edit.
ian [Sat, 2 Oct 2004 02:14:35 +0000 (02:14 +0000)]
red phase first
ian [Sat, 2 Oct 2004 02:14:22 +0000 (02:14 +0000)]
Moved from norway, now includes odyssey-train script and make install target etc.
ian [Sat, 2 Oct 2004 02:05:08 +0000 (02:05 +0000)]
add initial red only phase
ianmdlvl [Sun, 26 Sep 2004 15:34:23 +0000 (15:34 +0000)]
documentation comments
ianmdlvl [Sun, 26 Sep 2004 15:26:02 +0000 (15:26 +0000)]
reorganise test stuff; copybits now flashes per-pic led too
ian [Sun, 26 Sep 2004 13:50:42 +0000 (13:50 +0000)]
better arg parsing; more sophisticated siggen
ianmdlvl [Sun, 26 Sep 2004 13:42:57 +0000 (13:42 +0000)]
Clone flasher rev 1.6 as copybits, before hack a bit.
ianmdlvl [Sun, 26 Sep 2004 13:36:49 +0000 (13:36 +0000)]
remove some junk
ian [Sun, 12 Sep 2004 16:35:29 +0000 (16:35 +0000)]
Actually make tarball of postscripts and new gerbers
ian [Sun, 12 Sep 2004 16:33:41 +0000 (16:33 +0000)]
Make tarball of postscripts
ian [Sun, 12 Sep 2004 16:22:37 +0000 (16:22 +0000)]
before submit?
ian [Sun, 12 Sep 2004 16:11:29 +0000 (16:11 +0000)]
fix comment re flashing speed
ian [Sun, 12 Sep 2004 15:47:38 +0000 (15:47 +0000)]
flasher replaced with funky flasher
ian [Sun, 12 Sep 2004 14:58:42 +0000 (14:58 +0000)]
RPCL attaches before RPCI not after
ian [Thu, 9 Sep 2004 19:12:05 +0000 (19:12 +0000)]
mounting holes 177thou = 4.5mm
ian [Wed, 8 Sep 2004 19:29:14 +0000 (19:29 +0000)]
printed at nc
ian [Wed, 8 Sep 2004 00:01:57 +0000 (00:01 +0000)]
panel3, seems ready
ian [Tue, 7 Sep 2004 23:44:29 +0000 (23:44 +0000)]
horiz line not below last
ian [Tue, 7 Sep 2004 23:33:07 +0000 (23:33 +0000)]
include idstring
ian [Tue, 7 Sep 2004 23:25:25 +0000 (23:25 +0000)]
do stuff with panel3
ian [Tue, 7 Sep 2004 23:25:20 +0000 (23:25 +0000)]
allow negative decimals (and -0)
ian [Tue, 7 Sep 2004 23:22:20 +0000 (23:22 +0000)]
usagae comment
ian [Tue, 7 Sep 2004 23:16:57 +0000 (23:16 +0000)]
adjust cut gap for panel3
ian [Tue, 7 Sep 2004 23:16:22 +0000 (23:16 +0000)]
show cutlines
ian [Tue, 7 Sep 2004 23:15:57 +0000 (23:15 +0000)]
get rid of crappy unused 1 corner things
ian [Tue, 7 Sep 2004 22:57:07 +0000 (22:57 +0000)]
fix y dimension
ian [Tue, 7 Sep 2004 22:53:59 +0000 (22:53 +0000)]
gerbmerge is too bad
ian [Tue, 7 Sep 2004 22:53:50 +0000 (22:53 +0000)]
working on pcb-level merge
ian [Tue, 7 Sep 2004 18:42:08 +0000 (18:42 +0000)]
unused 1 (group7) used for merge outline
ian [Tue, 7 Sep 2004 18:40:33 +0000 (18:40 +0000)]
move via away from edge by manual routing lots of stuff
ian [Sat, 4 Sep 2004 14:32:11 +0000 (14:32 +0000)]
pcbdesigns for pad2pad and other quotes
ian [Sat, 4 Sep 2004 14:23:52 +0000 (14:23 +0000)]
make zipfiles
ian [Sat, 4 Sep 2004 00:41:45 +0000 (00:41 +0000)]
drc minoverlap 6
ian [Sat, 4 Sep 2004 00:37:36 +0000 (00:37 +0000)]
solder resist tol is 5th from pad every pad
ian [Sat, 4 Sep 2004 00:22:46 +0000 (00:22 +0000)]
fancier hole reports
ian [Sat, 4 Sep 2004 00:12:30 +0000 (00:12 +0000)]
change hole sizes for d25 and pfets
ian [Fri, 3 Sep 2004 23:19:18 +0000 (23:19 +0000)]
hole reports
ian [Thu, 2 Sep 2004 03:04:53 +0000 (03:04 +0000)]
show actually printing
ian [Thu, 2 Sep 2004 03:04:39 +0000 (03:04 +0000)]
actually print
ian [Thu, 2 Sep 2004 02:58:21 +0000 (02:58 +0000)]
a rune
ian [Thu, 2 Sep 2004 02:55:28 +0000 (02:55 +0000)]
reroute following pin changes
ian [Thu, 2 Sep 2004 02:46:43 +0000 (02:46 +0000)]
square up header pins
ian [Thu, 2 Sep 2004 02:40:39 +0000 (02:40 +0000)]
holes
ian [Thu, 2 Sep 2004 02:22:57 +0000 (02:22 +0000)]
bigger indiv1 pins, routed
ian [Thu, 2 Sep 2004 02:13:32 +0000 (02:13 +0000)]
routes again
ian [Thu, 2 Sep 2004 02:06:44 +0000 (02:06 +0000)]
before fix up fet pins
ian [Thu, 2 Sep 2004 01:47:34 +0000 (01:47 +0000)]
silk for point numbering
ian [Thu, 2 Sep 2004 01:39:47 +0000 (01:39 +0000)]
trimmed again
ian [Thu, 2 Sep 2004 01:39:33 +0000 (01:39 +0000)]
larger header-20
ian [Thu, 2 Sep 2004 01:30:24 +0000 (01:30 +0000)]
bus connector and annotations
ian [Thu, 2 Sep 2004 01:23:20 +0000 (01:23 +0000)]
detectors routes
ian [Thu, 2 Sep 2004 01:21:30 +0000 (01:21 +0000)]
before reshrink
ian [Thu, 2 Sep 2004 01:20:21 +0000 (01:20 +0000)]
new BUS connector
ian [Thu, 2 Sep 2004 01:03:56 +0000 (01:03 +0000)]
mounting hole diagrams
ian [Thu, 2 Sep 2004 00:38:00 +0000 (00:38 +0000)]
routes again
ian [Thu, 2 Sep 2004 00:10:57 +0000 (00:10 +0000)]
truncate points plug and trim layout by 25th
ian [Thu, 2 Sep 2004 00:08:03 +0000 (00:08 +0000)]
swap plug and socket
ian [Wed, 1 Sep 2004 23:56:14 +0000 (23:56 +0000)]
connector INDIV0 diagram
ian [Wed, 1 Sep 2004 23:56:02 +0000 (23:56 +0000)]
ignore gerber outputs
ian [Wed, 1 Sep 2004 23:35:47 +0000 (23:35 +0000)]
delete offboard silk from indiv0
ian [Wed, 1 Sep 2004 23:32:23 +0000 (23:32 +0000)]
before adjust silk
ian [Mon, 30 Aug 2004 02:45:26 +0000 (02:45 +0000)]
proper creation of oprints-l
ian [Mon, 30 Aug 2004 02:40:36 +0000 (02:40 +0000)]
pcboprints makes oprints-l
ian [Mon, 30 Aug 2004 02:40:05 +0000 (02:40 +0000)]
do not clean pcb output postscript files
ian [Mon, 30 Aug 2004 02:35:25 +0000 (02:35 +0000)]
now all a4
ian [Mon, 30 Aug 2004 02:16:47 +0000 (02:16 +0000)]
a3 handling improved
ian [Mon, 30 Aug 2004 01:49:42 +0000 (01:49 +0000)]
smaller; passes nicely; is next draft
ian [Mon, 30 Aug 2004 01:47:29 +0000 (01:47 +0000)]
fixes, routes nicely, before shrink manually again
ian [Mon, 30 Aug 2004 01:47:15 +0000 (01:47 +0000)]
sense8!
ian [Mon, 30 Aug 2004 00:11:29 +0000 (00:11 +0000)]
nicer printing arrangements
ian [Sun, 29 Aug 2004 20:20:55 +0000 (20:20 +0000)]
detectors draft finished
ian [Sun, 29 Aug 2004 20:05:54 +0000 (20:05 +0000)]
before resize
ian [Sun, 29 Aug 2004 20:00:22 +0000 (20:00 +0000)]
before shift
ian [Sun, 29 Aug 2004 19:56:50 +0000 (19:56 +0000)]
working on routing
ian [Sun, 29 Aug 2004 19:41:00 +0000 (19:41 +0000)]
really routes but still no room for text
ian [Sun, 29 Aug 2004 19:36:53 +0000 (19:36 +0000)]
routes but text does not fit
ian [Sun, 29 Aug 2004 18:50:24 +0000 (18:50 +0000)]
before much manual routing
ian [Sun, 29 Aug 2004 18:20:46 +0000 (18:20 +0000)]
reversers draft finished
ian [Sun, 29 Aug 2004 18:18:35 +0000 (18:18 +0000)]
before shrink
ian [Sun, 29 Aug 2004 17:30:31 +0000 (17:30 +0000)]
mounting holes placed
ian [Sun, 29 Aug 2004 16:29:25 +0000 (16:29 +0000)]
print detectors too
ian [Sun, 29 Aug 2004 16:29:17 +0000 (16:29 +0000)]
mounting holes
ian [Sun, 29 Aug 2004 00:22:26 +0000 (00:22 +0000)]
working on routing
ian [Sun, 29 Aug 2004 00:15:37 +0000 (00:15 +0000)]
ground and power routing
ian [Sat, 28 Aug 2004 23:37:34 +0000 (23:37 +0000)]
pic senses done? wip
ian [Sat, 28 Aug 2004 22:49:58 +0000 (22:49 +0000)]
sense lines route wip
ian [Sat, 28 Aug 2004 19:28:41 +0000 (19:28 +0000)]
rats nicely laid out etc except for pic pins
ian [Sat, 28 Aug 2004 18:30:53 +0000 (18:30 +0000)]
before reorg sense
ian [Sat, 28 Aug 2004 18:09:50 +0000 (18:09 +0000)]
redo layout placement wip
ian [Sat, 28 Aug 2004 17:50:31 +0000 (17:50 +0000)]
before delete stuff for redo
ian [Sat, 28 Aug 2004 17:30:30 +0000 (17:30 +0000)]
before move some rs*
ian [Sat, 28 Aug 2004 16:56:44 +0000 (16:56 +0000)]
rasN
ian [Sat, 28 Aug 2004 16:41:06 +0000 (16:41 +0000)]
make more like detectors. wip. problem with netlist
ian [Sat, 28 Aug 2004 16:26:43 +0000 (16:26 +0000)]
before c&p oc
ian [Sat, 28 Aug 2004 16:25:43 +0000 (16:25 +0000)]
before c&p oc
ian [Sat, 28 Aug 2004 16:04:06 +0000 (16:04 +0000)]
before turn brs
~ijackson / trains.git / log