From: ian Date: Wed, 26 May 2004 00:50:37 +0000 (+0000) Subject: on semi X-Git-Url: https://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=ad81873dd3c93aedbff70e8f17f7a193e1efbc1d;p=trains.git on semi --- diff --git a/spice/2n7000.mod b/spice/2n7000.mod index ece6401..faffea3 100644 --- a/spice/2n7000.mod +++ b/spice/2n7000.mod @@ -1,49 +1,61 @@ -*2N7000/2N7002/NDS7002A at Temp. Electrical Model -*------------------------------------------------- -.SUBCKT 2N7000 20 10 30 50 -*20=DRAIN 10=GATE 30=SOURCE 50=VTEMP -Rg 10 11x 1 -Rdu 12x 1 1u -M1 2 1 4x 4x DMOS L=1u W=1u -.MODEL DMOS NMOS(VTO=2.9 KP=8.2E-1 -+THETA=0.05 VMAX=0.8E5 LEVEL=3) -Cgs 1 5x 27p -Rd 20 4 4E-1 -Dds 5x 4 DDS -.MODEL DDS D(M=4.78E-1 VJ=1.22 CJO=27p) -Dbody 5x 20 DBODY -.MODEL DBODY D(IS=1.94E-12 N=1.201763 RS=0.00355 TT=43.65n) -Ra 4 2 4E-1 -Rs 5x 5 0.5m -Ls 5 30 0.5n -M2 1 8 6 6 INTER -E2 8 6 4 1 2 -.MODEL INTER NMOS(VTO=0 KP=10 LEVEL=1) -Cgdmax 7 4 58p -Rcgd 7 4 10meg -Dgd 6 4 DGD -Rdgd 6 4 10meg -.MODEL DGD D(M=4.25E-1 VJ=8.38E-2 CJO=58p) -M3 7 9 1 1 INTER -E3 9 1 4 1 -2 -*ZX SECTION -EOUT 4x 6x poly(2) (1x,0) (3x,0) 0 0 0 0 1 -FCOPY 0 3x VSENSE 1 -RIN 1x 0 1G -VSENSE 6x 5x 0 -RREF 3x 0 10m -*TEMP SECTION -ED 101 0 VALUE {V(50,100)} -VAMB 100 0 25 -EKP 1x 0 101 0 .82 -*VTO TEMP SECTION -EVTO 102 0 101 0 .005 -EVT 12x 11x 102 0 1 -*DIODE THEMO BREAKDOWN SECTION -EBL VB1 VB2 101 0 .08 -VBLK VB2 0 60 -D 20 DB1 DBLK -.MODEL DBLK D(IS=1E-14 CJO=.1p RS=.1) -EDB DB1 0 VB1 0 1 -.ENDS 2N7000 -*2N7000/2N7002/NDS7002A (Rev.B) 8/6/02 **ST +.SUBCKT 2n7000 1 2 3 +************************************** +* Model Generated by MODPEX * +*Copyright(c) Symmetry Design Systems* +* All Rights Reserved * +* UNPUBLISHED LICENSED SOFTWARE * +* Contains Proprietary Information * +* Which is The Property of * +* SYMMETRY OR ITS LICENSORS * +*Commercial Use or Resale Restricted * +* by Symmetry License Agreement * +************************************** +* Model generated on Mar 31, 04 +* MODEL FORMAT: SPICE3 +* Symmetry POWER MOS Model (Version 1.0) +* External Node Designations +* Node 1 -> Drain +* Node 2 -> Gate +* Node 3 -> Source +M1 9 7 8 8 MM L=100u W=100u +* Default values used in MM: +* The voltage-dependent capacitances are +* not included. Other default values are: +* RS=0 RD=0 LD=0 CBD=0 CBS=0 CGBO=0 +.MODEL MM NMOS LEVEL=1 IS=1e-32 ++VTO=2.236 LAMBDA=0 KP=0.0932174 ++CGSO=1.79115e-07 CGDO=1.0724e-11 +RS 8 3 1.10523 +D1 3 1 MD +.MODEL MD D IS=2.71011e-10 RS=0.0140826 N=1.5 BV=60 ++IBV=1e-05 EG=1.16084 XTI=3.00131 TT=0 ++CJO=3.41211e-11 VJ=4.67429 M=0.899864 FC=0.1 +RDS 3 1 2.4e+11 +RD 9 1 0.0001 +RG 2 7 2.18034 +D2 4 5 MD1 +* Default values used in MD1: +* RS=0 EG=1.11 XTI=3.0 TT=0 +* BV=infinite IBV=1mA +.MODEL MD1 D IS=1e-32 N=50 ++CJO=7.93181e-11 VJ=0.643298 M=0.9 FC=1e-08 +D3 0 5 MD2 +* Default values used in MD2: +* EG=1.11 XTI=3.0 TT=0 CJO=0 +* BV=infinite IBV=1mA +.MODEL MD2 D IS=1e-10 N=0.400165 RS=3.00002e-06 +RL 5 10 1 +FI2 7 9 VFI2 -1 +VFI2 4 0 0 +EV16 10 0 9 7 1 +CAP 11 10 1.58786e-10 +FI1 7 9 VFI1 -1 +VFI1 11 6 0 +RCAP 6 10 1 +D4 0 6 MD3 +* Default values used in MD3: +* EG=1.11 XTI=3.0 TT=0 CJO=0 +* RS=0 BV=infinite IBV=1mA +.MODEL MD3 D IS=1e-10 N=0.400165 +.ENDS 2n7000 +