From: ian Date: Thu, 5 Aug 2004 21:58:35 +0000 (+0000) Subject: first reverser seems ok X-Git-Url: https://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=82cef517cf5b56ca51689fb9903f7f500c040138;p=trains.git first reverser seems ok --- diff --git a/pcb/reversers.pcb b/pcb/reversers.pcb index b807d9e..68c9305 100644 --- a/pcb/reversers.pcb +++ b/pcb/reversers.pcb @@ -1,12 +1,12 @@ # release: pcb-bin 1.99p -# date: Thu Aug 5 22:29:55 2004 +# date: Thu Aug 5 22:58:26 2004 # user: ian (Ian Jackson) # host: anarres.relativity.greenend.org.uk PCB["reversers.pcb" 1450000 360000] Grid[2500.00000000 0 0 1] -Cursor[560000 66750 1.000000] +Cursor[590000 151886 3.000000] Thermal[0.500000] DRC[699 400 800 800] Flags(0x0000000000001e51) @@ -793,7 +793,7 @@ Element[0x00000000 "" "RLY0" "" 500000 125000 -25000 12500 0 100 0x00000000] ) -Element[0x00000000 "generic" "" "DIL 40" 645000 50000 32000 5000 3 100 0x00000000] +Element[0x00000000 "generic" "PIC" "DIL 40" 645000 50000 32000 5000 3 100 0x00000000] ( Pin[0 0 6000 3000 6000 2800 "1" "1" 0x00000101] Pin[0 10000 6000 3000 6000 2800 "2" "2" 0x00000001] @@ -846,7 +846,7 @@ Element[0x00000000 "generic" "" "DIL 40" 645000 50000 32000 5000 3 100 0x0000000 Element[0x00000000 "" "XX0" "" 475000 30000 -5000 -10000 0 100 0x00000000] ( - Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001] + Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000041] ElementLine [0 5000 -5000 0 1000] ElementLine [5000 0 0 5000 1000] ElementLine [0 -5000 5000 0 1000] @@ -867,7 +867,7 @@ Element[0x00000000 "" "XC0" "" 460000 30000 -5000 -10000 0 100 0x00000000] Element[0x00000000 "" "BR0" "" 435000 57500 12500 -5000 0 100 0x00000000] ( Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001] - Pin[42500 0 6000 2000 6006 3500 "" "2" 0x00000001] + Pin[42500 0 6000 2000 6006 3500 "" "2" 0x00000041] Pin[42500 42500 6000 2000 6006 3500 "" "3" 0x00000001] Pin[0 42500 6000 2000 6006 3500 "" "4" 0x00000001] ElementLine [0 -10000 52500 -10000 1000] @@ -883,10 +883,10 @@ Element[0x00000000 "" "BR0" "" 435000 57500 12500 -5000 0 100 0x00000000] ) -Element[0x00000000 "resistor_axial" "RS0" "500" 547500 137500 -1400 -2000 1 100 0x00000000] +Element[0x00000000 "resistor_axial" "RS0" "500" 502500 92500 -1400 -2000 1 100 0x00000000] ( Pin[0 12500 5000 3000 5600 2000 "1" "1" 0x00000101] - Pin[0 -37500 5000 3000 5600 2000 "2" "2" 0x00000001] + Pin[0 -37500 5000 3000 5600 2000 "2" "2" 0x00000041] ElementLine [-4100 0 4100 0 1000] ElementLine [4100 -25000 4100 0 1000] ElementLine [-4100 -25000 4100 -25000 1000] @@ -925,7 +925,7 @@ Element[0x00000000 "generic" "ULN0" "DIL 18" 615000 122500 -22500 -27000 0 100 0 ) -Element[0x00000000 "" "VRLY0" "" 540000 30000 -5000 -10000 0 100 0x00000000] +Element[0x00000000 "" "VRLY0" "" 565000 30000 -5000 -10000 0 100 0x00000000] ( Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001] ElementLine [-5000 0 0 -5000 1000] @@ -935,7 +935,7 @@ Element[0x00000000 "" "VRLY0" "" 540000 30000 -5000 -10000 0 100 0x00000000] ) -Element[0x00000000 "" "BOOSTA" "" 507500 30000 -5000 -10000 0 100 0x00000000] +Element[0x00000000 "" "BOOSTA" "" 515000 30000 -17500 -10000 0 100 0x00000000] ( Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001] ElementLine [0 5000 -5000 0 1000] @@ -945,7 +945,7 @@ Element[0x00000000 "" "BOOSTA" "" 507500 30000 -5000 -10000 0 100 0x00000000] ) -Element[0x00000000 "" "BOOSTB" "" 430000 30000 -5000 -10000 0 100 0x00000000] +Element[0x00000000 "" "BOOSTB" "" 530000 30000 -5000 -10000 0 100 0x00000000] ( Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001] ElementLine [-5000 0 0 -5000 1000] @@ -955,7 +955,34 @@ Element[0x00000000 "" "BOOSTB" "" 430000 30000 -5000 -10000 0 100 0x00000000] ) -Element[0x00000000 "generic" "OC0" "DIL 18" 572500 147500 10000 8000 0 100 0x00000000] +Element[0x00000000 "capacitor_radial" "CULN0" "200" 540000 65000 -2500 -17500 0 100 0x00000000] +( + Pin[0 0 6000 3000 6600 2000 "1" "1" 0x00004101] + Pin[10000 0 6000 3000 6600 2000 "2" "2" 0x00004001] + ElementArc [5000 0 10000 10000 0 360 1000] + + ) + +Element[0x00000000 "8xR-array 0.25W, common pin" "RA0" "100" 620000 172500 11000 -4000 3 100 0x00000000] +( + Pin[0 0 5000 3000 5600 2000 "common" "1" 0x00000101] + Pin[0 10000 5000 3000 5600 2000 "1" "2" 0x00000001] + Pin[0 20000 5000 3000 5600 2000 "2" "3" 0x00000001] + Pin[0 30000 5000 3000 5600 2000 "3" "4" 0x00000001] + Pin[0 40000 5000 3000 5600 2000 "4" "5" 0x00000001] + Pin[0 50000 5000 3000 5600 2000 "5" "6" 0x00000001] + Pin[0 60000 5000 3000 5600 2000 "6" "7" 0x00000001] + Pin[0 70000 5000 3000 5600 2000 "7" "8" 0x00000001] + Pin[0 80000 5000 3000 5600 2000 "8" "9" 0x00000001] + ElementLine [-5000 5000 5000 5000 1000] + ElementLine [5000 0 5000 80000 2000] + ElementLine [-5000 0 -5000 80000 2000] + ElementArc [0 80000 5000 5000 0 180 2000] + ElementArc [0 0 5000 5000 180 180 2000] + + ) + +Element[0x00000000 "generic" "OC0" "DIL 16" 567500 150000 17000 5000 3 100 0x00000000] ( Pin[0 0 6000 3000 6600 2800 "1" "1" 0x00000101] Pin[0 10000 6000 3000 6600 2800 "2" "2" 0x00000001] @@ -965,26 +992,24 @@ Element[0x00000000 "generic" "OC0" "DIL 18" 572500 147500 10000 8000 0 100 0x000 Pin[0 50000 6000 3000 6600 2800 "6" "6" 0x00000001] Pin[0 60000 6000 3000 6600 2800 "7" "7" 0x00000001] Pin[0 70000 6000 3000 6600 2800 "8" "8" 0x00000001] - Pin[0 80000 6000 3000 6600 2800 "9" "9" 0x00000001] - Pin[30000 80000 6000 3000 6600 2800 "10" "10" 0x00000001] - Pin[30000 70000 6000 3000 6600 2800 "11" "11" 0x00000001] - Pin[30000 60000 6000 3000 6600 2800 "12" "12" 0x00000001] - Pin[30000 50000 6000 3000 6600 2800 "13" "13" 0x00000001] - Pin[30000 40000 6000 3000 6600 2800 "14" "14" 0x00000001] - Pin[30000 30000 6000 3000 6600 2800 "15" "15" 0x00000001] - Pin[30000 20000 6000 3000 6600 2800 "16" "16" 0x00000001] - Pin[30000 10000 6000 3000 6600 2800 "17" "17" 0x00000001] - Pin[30000 0 6000 3000 6600 2800 "18" "18" 0x00000001] + Pin[30000 70000 6000 3000 6600 2800 "9" "9" 0x00000001] + Pin[30000 60000 6000 3000 6600 2800 "10" "10" 0x00000001] + Pin[30000 50000 6000 3000 6600 2800 "11" "11" 0x00000001] + Pin[30000 40000 6000 3000 6600 2800 "12" "12" 0x00000001] + Pin[30000 30000 6000 3000 6600 2800 "13" "13" 0x00000001] + Pin[30000 20000 6000 3000 6600 2800 "14" "14" 0x00000001] + Pin[30000 10000 6000 3000 6600 2800 "15" "15" 0x00000001] + Pin[30000 0 6000 3000 6600 2800 "16" "16" 0x00000001] ElementLine [20000 -5000 35000 -5000 1000] ElementLine [-5000 -5000 10000 -5000 1000] - ElementLine [35000 -5000 35000 85000 1000] - ElementLine [-5000 85000 35000 85000 1000] - ElementLine [-5000 -5000 -5000 85000 1000] + ElementLine [35000 75000 35000 -5000 1000] + ElementLine [-5000 75000 35000 75000 1000] + ElementLine [-5000 -5000 -5000 75000 1000] ElementArc [15000 -5000 5000 5000 0 180 1000] ) -Element[0x00000000 "generic" "OC1" "DIL 18" 572500 245000 10000 13000 0 100 0x00000000] +Element[0x00000000 "generic" "OC1" "DIL 16" 567500 240000 17000 5000 3 100 0x00000000] ( Pin[0 0 6000 3000 6600 2800 "1" "1" 0x00000101] Pin[0 10000 6000 3000 6600 2800 "2" "2" 0x00000001] @@ -994,49 +1019,48 @@ Element[0x00000000 "generic" "OC1" "DIL 18" 572500 245000 10000 13000 0 100 0x00 Pin[0 50000 6000 3000 6600 2800 "6" "6" 0x00000001] Pin[0 60000 6000 3000 6600 2800 "7" "7" 0x00000001] Pin[0 70000 6000 3000 6600 2800 "8" "8" 0x00000001] - Pin[0 80000 6000 3000 6600 2800 "9" "9" 0x00000001] - Pin[30000 80000 6000 3000 6600 2800 "10" "10" 0x00000001] - Pin[30000 70000 6000 3000 6600 2800 "11" "11" 0x00000001] - Pin[30000 60000 6000 3000 6600 2800 "12" "12" 0x00000001] - Pin[30000 50000 6000 3000 6600 2800 "13" "13" 0x00000001] - Pin[30000 40000 6000 3000 6600 2800 "14" "14" 0x00000001] - Pin[30000 30000 6000 3000 6600 2800 "15" "15" 0x00000001] - Pin[30000 20000 6000 3000 6600 2800 "16" "16" 0x00000001] - Pin[30000 10000 6000 3000 6600 2800 "17" "17" 0x00000001] - Pin[30000 0 6000 3000 6600 2800 "18" "18" 0x00000001] + Pin[30000 70000 6000 3000 6600 2800 "9" "9" 0x00000001] + Pin[30000 60000 6000 3000 6600 2800 "10" "10" 0x00000001] + Pin[30000 50000 6000 3000 6600 2800 "11" "11" 0x00000001] + Pin[30000 40000 6000 3000 6600 2800 "12" "12" 0x00000001] + Pin[30000 30000 6000 3000 6600 2800 "13" "13" 0x00000001] + Pin[30000 20000 6000 3000 6600 2800 "14" "14" 0x00000001] + Pin[30000 10000 6000 3000 6600 2800 "15" "15" 0x00000001] + Pin[30000 0 6000 3000 6600 2800 "16" "16" 0x00000001] ElementLine [20000 -5000 35000 -5000 1000] ElementLine [-5000 -5000 10000 -5000 1000] - ElementLine [35000 -5000 35000 85000 1000] - ElementLine [-5000 85000 35000 85000 1000] - ElementLine [-5000 -5000 -5000 85000 1000] + ElementLine [35000 75000 35000 -5000 1000] + ElementLine [-5000 75000 35000 75000 1000] + ElementLine [-5000 -5000 -5000 75000 1000] ElementArc [15000 -5000 5000 5000 0 180 1000] ) -Element[0x00000000 "8xR-array 0.25W, common pin" "RA0" "100" 625000 150000 11000 -4000 3 100 0x00000000] +Element[0x00000000 "capacitor_radial" "CPIC" "200" 620000 140000 10000 15000 3 100 0x00000000] ( - Pin[0 0 5000 3000 5600 2000 "common" "1" 0x00000101] - Pin[0 10000 5000 3000 5600 2000 "1" "2" 0x00000001] - Pin[0 20000 5000 3000 5600 2000 "2" "3" 0x00000001] - Pin[0 30000 5000 3000 5600 2000 "3" "4" 0x00000001] - Pin[0 40000 5000 3000 5600 2000 "4" "5" 0x00000001] - Pin[0 50000 5000 3000 5600 2000 "5" "6" 0x00000001] - Pin[0 60000 5000 3000 5600 2000 "6" "7" 0x00000001] - Pin[0 70000 5000 3000 5600 2000 "7" "8" 0x00000001] - Pin[0 80000 5000 3000 5600 2000 "8" "9" 0x00000001] - ElementLine [-5000 5000 5000 5000 1000] - ElementLine [5000 0 5000 80000 2000] - ElementLine [-5000 0 -5000 80000 2000] - ElementArc [0 80000 5000 5000 0 180 2000] - ElementArc [0 0 5000 5000 180 180 2000] + Pin[0 0 6000 3000 6600 2000 "1" "1" 0x00000101] + Pin[0 10000 6000 3000 6600 2000 "2" "2" 0x00000001] + ElementArc [0 5000 10000 10000 270 360 1000] ) -Element[0x00000000 "capacitor_radial" "CULN0" "200" 540000 65000 -2500 -17500 0 100 0x00000000] +Element[0x00000000 "" "GND" "" 642500 30000 -5000 -10000 0 100 0x00000000] ( - Pin[0 0 6000 3000 6600 2000 "1" "1" 0x00004101] - Pin[10000 0 6000 3000 6600 2000 "2" "2" 0x00004001] - ElementArc [5000 0 10000 10000 0 360 1000] + Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000041] + ElementLine [0 5000 -5000 0 1000] + ElementLine [5000 0 0 5000 1000] + ElementLine [0 -5000 5000 0 1000] + ElementLine [-5000 0 0 -5000 1000] + + ) + +Element[0x00000000 "" "VCC" "" 667500 30000 -5000 -10000 0 100 0x00000000] +( + Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000041] + ElementLine [-5000 0 0 -5000 1000] + ElementLine [0 -5000 5000 0 1000] + ElementLine [5000 0 0 5000 1000] + ElementLine [0 5000 -5000 0 1000] ) Layer(1 "component") @@ -1071,3 +1095,86 @@ Layer(10 "silk") Arc[455001 145001 1 1 1000 2000 0 -90 0x00000020] Arc[455001 145001 1 1 1000 2000 -90 90 0x00000020] ) +NetList() +( + Net("afsenrx0" "Signal") + ( + Connect("RS0-1") + Connect("OC0-1") + ) + Net("afsenx0" "Power") + ( + Connect("BR0-2") + Connect("XX0-1") + Connect("RS0-2") + ) + Net("befsenx0" "Power") + ( + Connect("RLY0-8") + Connect("RLY0-11") + Connect("BR0-4") + Connect("OC0-2") + ) + Net("boosta" "Power") + ( + Connect("RLY0-4") + Connect("BOOSTA-1") + ) + Net("boostb" "Power") + ( + Connect("RLY0-13") + Connect("BOOSTB-1") + ) + Net("gnd" "Signal") + ( + Connect("ULN0-9") + Connect("CULN0-1") + Connect("OC0-15") + Connect("GND-1") + Connect("PIC-12") + Connect("PIC-31") + Connect("CPIC-2") + ) + Net("picout0" "Signal") + ( + Connect("PIC-2") + Connect("ULN0-8") + ) + Net("rlydrv0" "Signal") + ( + Connect("ULN0-11") + Connect("RLY0-1") + ) + Net("seni0" "Signal") + ( + Connect("OC0-16") + Connect("PIC-10") + Connect("RA0-2") + ) + Net("shortbr0" "Power") + ( + Connect("BR0-1") + Connect("BR0-3") + ) + Net("trackc" "Power") + ( + Connect("RLY0-6") + Connect("RLY0-9") + Connect("XC0-1") + ) + Net("vcc" "Signal") + ( + Connect("RA0-1") + Connect("VCC-1") + Connect("PIC-11") + Connect("PIC-32") + Connect("CPIC-1") + ) + Net("vrly0" "Signal") + ( + Connect("CULN0-2") + Connect("VRLY0-1") + Connect("ULN0-10") + Connect("RLY0-16") + ) +) diff --git a/reversers-netlist.pl b/reversers-netlist.pl index 6f2f60c..6fb22ae 100755 --- a/reversers-netlist.pl +++ b/reversers-netlist.pl @@ -1,6 +1,6 @@ #!/usr/bin/perl -$max=1; +$max=0; sub o ($$$@) { my ($netname, $type, $fmt, @stuff) = @_; @@ -11,7 +11,7 @@ sub o ($$$@) { die "$netname $type" if $net{$netname}{Type} ne $type; } $net{$netname}{Type}= $type; - $net{$netname}{Stuff}.= $stuff; + $net{$netname}{Stuff}.= " ".$stuff; } @pinleft= (2..10, 14..17, 19,20); @@ -19,11 +19,15 @@ sub o ($$$@) { @picpin= (@pinleft, @pinright); -for $uln (0..1) { - next if $uln*8 > $max; - o("vrly$uln", Power, "CULN%d-2 VRLY%d ULN%d-10", - $uln, - $uln); +for $wh8 (0..1) { + next if $wh8*8 > $max; + o("vrly$wh8", Signal, "CULN%d-2 VRLY%d-1 ULN%d-10", + $wh8, + $wh8); + o("gnd", Signal, "ULN%d-9 CULN%d-1", + $wh8, $wh8); + o("vcc", Signal, "RA%d-1", + $wh8); } for $iter (0..15) { @@ -38,20 +42,28 @@ for $iter (0..15) { o("rlydrv$iter", Signal, "ULN%d-%d RLY%d-1", $wh8, 11+$in8, $iter); - o("vrly$wh8", Power, "RLY%d-16", $iter); + o("vrly$wh8", Signal, "RLY%d-16", $iter); o("boosta", Power, "RLY%d-4", $iter); o("boostb", Power, "RLY%d-13", $iter); o("trackc", Power, "RLY%d-6 RLY%d-9 XC%d-1", $iter, $iter, $iter); + o("shortbr$iter", Power, "BR%d-1 BR%d-3", $iter, $iter); o("befsenx$iter", Power, "RLY%d-8 RLY%d-11 BR%d-4 OC%d-%d", $iter, $iter, $iter, $wh4,$in4*2+2); o("afsenx$iter", Power, "BR%d-2 XX%d-1 RS%d-2", $iter, $iter, $iter); + o("afsenrx$iter", Signal, "RS%d-1 OC%d-%d", + $iter, $wh4, 1+($in4*2)); o("gnd", Signal, "OC%d-%d", $wh4, 15-($in4*2)); o("seni$iter", Signal, "OC%d-%d PIC-%d RA%d-%d", $wh4, 16-($in4*2), - $picpin[$iter+8], $in8+2); + $picpin[$iter+8], $wh8, $in8+2); } +o("gnd", Signal, "GND-1 PIC-12 PIC-31 CPIC-2"); +o("vcc", Signal, "VCC-1 PIC-11 PIC-32 CPIC-1"); +o("boosta", Power, "BOOSTA-1"); +o("boostb", Power, "BOOSTB-1"); + foreach $netname (sort keys %net) { printf("%s\t%s\t%s\n", $netname,