ACCSFR equ 0x0f00
-COUNTFAST equ 0x00
+COUNTINNER equ 0x00
COUNTMEDIUM equ 0x01
-COUNTSLOW equ 0x02
+COUNTOUTER equ 0x02
-SLOWEXP equ 3 ; 2^3 * 40ms = 320ms
+OUTEREXP equ 7 ; 2^7 * 2.6ms = 332ms
; we always leave each loop when its counter has reached 0, so on
; entry we assume it's already 0. For the loops which want to
; count all the way (256 iterations) that's good.
start
- bcf TRISA-ACCSFR, 0, 0
+ bcf TRISA, 0, 0 ; enable flasher output
+ movlw 0x07 ; turn off A-to-D so we get
+ movwf ADCON1, 0 ; digital inputs on RA0-3 (AN0-3)
+ bcf TRISD, 4, 0 ; enable output D
+ movlw 0xe0 ; enable outputs E,F,G
+ movwf TRISC, 0 ; (RC5-7)
+
loop
- btg LATA-ACCSFR, 0, 0
+ btg LATA, 0, 0
; set a bit which says how fast the led
; should flash and count down from 2^(that bit)
- bsf COUNTSLOW, SLOWEXP, 0
-delayslow_loop
+ bsf COUNTOUTER, OUTEREXP, 0
+delayouter_loop
+
+delayinner_loop
+
+copybit_mi macro sourcereg, sourcebitno, destreg, destbitvals, xorinv
+ movf destreg, 0, 0 ; read output latch
+ andlw ~destbitvals ; mask out output bit
+ btfsc sourcereg, sourcebitno, 0 ; skip if input clear
+ iorlw destbitvals ; add output bit
+ xorlw xorinv ; invert?
+ movwf destreg, 0 ; write output latch
+ endm ; (6cy total)
+
+copybiti macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, dbitvals
+ endm
+
+copybit macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, 0
+ endm
-delaymedium_loop
+ copybiti PORTB, 5, TRISA, 0x06 ; C enable
+ copybit PORTB, 4, PORTA, 0x06 ; C data
+ copybiti PORTB, 3, TRISA, 0x18 ; B enable
+ copybit PORTB, 2, PORTA, 0x18 ; B data
+ copybiti PORTB, 1, TRISA, 0x20 ; A enable
+ copybiti PORTB, 1, TRISE, 0x01 ; A enable
+ copybit PORTB, 0, TRISA, 0x20 ; A data
+ copybit PORTB, 0, PORTA, 0x01 ; A data
-delayfast_loop
- decfsz COUNTFAST, 1, 0 ; 1 cycle
- goto delayfast_loop ; 2 cycles (skipped or not)
-; exited delayfast_loop ; total: 3 * 256 = 768 cycles
-
+ copybit PORTA, 6, PORTD, 0x10 ; D
+ copybit PORTC, 0, PORTC, 0x80 ; E
+ copybiti PORTC, 1, PORTC, 0x40 ; F
+ copybiti PORTC, 2, PORTC, 0x20 ; G
+ ; 12 x copybit @6 = 48cy
- decfsz COUNTMEDIUM, 1, 0 ; 1 cycle
- goto delaymedium_loop ; 2 cycles (skipped or not)
-; exited delaymedium_loop ; total: ~198000 cycles
+ decfsz COUNTINNER, 1, 0 ; 1 cycle
+ goto delayinner_loop ; 2 cycles (skipped or not)
+; exited delayinner_loop ; total: 51cy * 256 = 13056cy
; each cycle 0.2us
- ; so each medium loop is ~40ms
+ ; so each inner loop is ~2.6ms
- decfsz COUNTSLOW, 1, 0
- goto delayslow_loop
-; exited delayslow_loop
+ decfsz COUNTOUTER, 1, 0
+ goto delayouter_loop
+; exited delayouter_loop
goto loop
ACCSFR equ 0x0f00
-COUNTFAST equ 0x00
+COUNTINNER equ 0x00
COUNTMEDIUM equ 0x01
-COUNTSLOW equ 0x02
+COUNTOUTER equ 0x02
-SLOWEXP equ 3 ; 2^3 * 40ms = 320ms
+OUTEREXP equ 7 ; 2^7 * 2.6ms = 332ms
; we always leave each loop when its counter has reached 0, so on
; entry we assume it's already 0. For the loops which want to
; count all the way (256 iterations) that's good.
start
- bcf TRISA-ACCSFR, 0, 0
+ bcf TRISA, 0, 0 ; enable flasher output
+ movlw 0x07 ; turn off A-to-D so we get
+ movwf ADCON1, 0 ; digital inputs on RA0-3 (AN0-3)
+ bcf TRISD, 4, 0 ; enable output D
+ movlw 0xe0 ; enable outputs E,F,G
+ movwf TRISC, 0 ; (RC5-7)
+
loop
- btg LATA-ACCSFR, 0, 0
+ btg LATA, 0, 0
; set a bit which says how fast the led
; should flash and count down from 2^(that bit)
- bsf COUNTSLOW, SLOWEXP, 0
-delayslow_loop
+ bsf COUNTOUTER, OUTEREXP, 0
+delayouter_loop
+
+delayinner_loop
+
+copybit_mi macro sourcereg, sourcebitno, destreg, destbitvals, xorinv
+ movf destreg, 0, 0 ; read output latch
+ andlw ~destbitvals ; mask out output bit
+ btfsc sourcereg, sourcebitno, 0 ; skip if input clear
+ iorlw destbitvals ; add output bit
+ xorlw xorinv ; invert?
+ movwf destreg, 0 ; write output latch
+ endm ; (6cy total)
+
+copybiti macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, dbitvals
+ endm
+
+copybit macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, 0
+ endm
-delaymedium_loop
+ copybiti PORTB, 5, TRISA, 0x06 ; C enable
+ copybit PORTB, 4, PORTA, 0x06 ; C data
+ copybiti PORTB, 3, TRISA, 0x18 ; B enable
+ copybit PORTB, 2, PORTA, 0x18 ; B data
+ copybiti PORTB, 1, TRISA, 0x20 ; A enable
+ copybiti PORTB, 1, TRISE, 0x01 ; A enable
+ copybit PORTB, 0, TRISA, 0x20 ; A data
+ copybit PORTB, 0, PORTA, 0x01 ; A data
-delayfast_loop
- decfsz COUNTFAST, 1, 0 ; 1 cycle
- goto delayfast_loop ; 2 cycles (skipped or not)
-; exited delayfast_loop ; total: 3 * 256 = 768 cycles
-
+ copybit PORTA, 6, PORTD, 0x10 ; D
+ copybit PORTC, 0, PORTC, 0x80 ; E
+ copybiti PORTC, 1, PORTC, 0x40 ; F
+ copybiti PORTC, 2, PORTC, 0x20 ; G
+ ; 12 x copybit @6 = 48cy
- decfsz COUNTMEDIUM, 1, 0 ; 1 cycle
- goto delaymedium_loop ; 2 cycles (skipped or not)
-; exited delaymedium_loop ; total: ~198000 cycles
+ decfsz COUNTINNER, 1, 0 ; 1 cycle
+ goto delayinner_loop ; 2 cycles (skipped or not)
+; exited delayinner_loop ; total: 51cy * 256 = 13056cy
; each cycle 0.2us
- ; so each medium loop is ~40ms
+ ; so each inner loop is ~2.6ms
- decfsz COUNTSLOW, 1, 0
- goto delayslow_loop
-; exited delayslow_loop
+ decfsz COUNTOUTER, 1, 0
+ goto delayouter_loop
+; exited delayouter_loop
goto loop
ACCSFR equ 0x0f00
-COUNTFAST equ 0x00
+COUNTINNER equ 0x00
COUNTMEDIUM equ 0x01
-COUNTSLOW equ 0x02
+COUNTOUTER equ 0x02
-SLOWEXP equ 3 ; 2^3 * 40ms = 320ms
+OUTEREXP equ 7 ; 2^7 * 2.6ms = 332ms
; we always leave each loop when its counter has reached 0, so on
; entry we assume it's already 0. For the loops which want to
; count all the way (256 iterations) that's good.
start
- bcf TRISA-ACCSFR, 0, 0
+ bcf TRISA, 0, 0 ; enable flasher output
+ movlw 0x07 ; turn off A-to-D so we get
+ movwf ADCON1, 0 ; digital inputs on RA0-3 (AN0-3)
+ bcf TRISD, 4, 0 ; enable output D
+ movlw 0xe0 ; enable outputs E,F,G
+ movwf TRISC, 0 ; (RC5-7)
+
loop
- btg LATA-ACCSFR, 0, 0
+ btg LATA, 0, 0
; set a bit which says how fast the led
; should flash and count down from 2^(that bit)
- bsf COUNTSLOW, SLOWEXP, 0
-delayslow_loop
+ bsf COUNTOUTER, OUTEREXP, 0
+delayouter_loop
+
+delayinner_loop
+
+copybit_mi macro sourcereg, sourcebitno, destreg, destbitvals, xorinv
+ movf destreg, 0, 0 ; read output latch
+ andlw ~destbitvals ; mask out output bit
+ btfsc sourcereg, sourcebitno, 0 ; skip if input clear
+ iorlw destbitvals ; add output bit
+ xorlw xorinv ; invert?
+ movwf destreg, 0 ; write output latch
+ endm ; (6cy total)
+
+copybiti macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, dbitvals
+ endm
+
+copybit macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, 0
+ endm
-delaymedium_loop
+ copybiti PORTB, 5, TRISA, 0x06 ; C enable
+ copybit PORTB, 4, PORTA, 0x06 ; C data
+ copybiti PORTB, 3, TRISA, 0x18 ; B enable
+ copybit PORTB, 2, PORTA, 0x18 ; B data
+ copybiti PORTB, 1, TRISA, 0x20 ; A enable
+ copybiti PORTB, 1, TRISE, 0x01 ; A enable
+ copybit PORTB, 0, TRISA, 0x20 ; A data
+ copybit PORTB, 0, PORTA, 0x01 ; A data
-delayfast_loop
- decfsz COUNTFAST, 1, 0 ; 1 cycle
- goto delayfast_loop ; 2 cycles (skipped or not)
-; exited delayfast_loop ; total: 3 * 256 = 768 cycles
-
+ copybit PORTA, 6, PORTD, 0x10 ; D
+ copybit PORTC, 0, PORTC, 0x80 ; E
+ copybiti PORTC, 1, PORTC, 0x40 ; F
+ copybiti PORTC, 2, PORTC, 0x20 ; G
+ ; 12 x copybit @6 = 48cy
- decfsz COUNTMEDIUM, 1, 0 ; 1 cycle
- goto delaymedium_loop ; 2 cycles (skipped or not)
-; exited delaymedium_loop ; total: ~198000 cycles
+ decfsz COUNTINNER, 1, 0 ; 1 cycle
+ goto delayinner_loop ; 2 cycles (skipped or not)
+; exited delayinner_loop ; total: 51cy * 256 = 13056cy
; each cycle 0.2us
- ; so each medium loop is ~40ms
+ ; so each inner loop is ~2.6ms
- decfsz COUNTSLOW, 1, 0
- goto delayslow_loop
-; exited delayslow_loop
+ decfsz COUNTOUTER, 1, 0
+ goto delayouter_loop
+; exited delayouter_loop
goto loop
~ijackson / trains.git / commitdiff