; * leaves all other pins set to their default states (usually Z).
include /usr/share/gputils/header/p18f458.inc
+ include onecopybit.inc
ACCSFR equ 0x0f00
delayinner_loop
-copybit_mi macro sourcereg, sourcebitno, destreg, destbitvals, xorinv
- movf destreg, 0, 0 ; read output latch
- andlw ~destbitvals ; mask out output bit
- btfsc sourcereg, sourcebitno, 0 ; skip if input clear
- iorlw destbitvals ; add output bit
- xorlw xorinv ; invert?
- movwf destreg, 0 ; write output latch
- endm ; (6cy total)
-
-copybiti macro sreg, sbitno, dreg, dbitvals
- copybit_mi sreg, sbitno, dreg, dbitvals, dbitvals
- endm
-
-copybit macro sreg, sbitno, dreg, dbitvals
- copybit_mi sreg, sbitno, dreg, dbitvals, 0
- endm
-
copybiti PORTB, 5, TRISA, 0x06 ; C enable
copybit PORTB, 4, LATA, 0x06 ; C data
copybiti PORTB, 3, TRISA, 0x18 ; B enable
--- /dev/null
+; macro for copying bits about
+
+copybit_mi macro sourcereg, sourcebitno, destreg, destbitvals, xorinv
+ movf destreg, 0, 0 ; read output latch
+ andlw ~destbitvals ; mask out output bit
+ btfsc sourcereg, sourcebitno, 0 ; skip if input clear
+ iorlw destbitvals ; add output bit
+ xorlw xorinv ; invert?
+ movwf destreg, 0 ; write output latch
+ endm ; (6cy total)
+
+copybiti macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, dbitvals
+ endm
+
+copybit macro sreg, sbitno, dreg, dbitvals
+ copybit_mi sreg, sbitno, dreg, dbitvals, 0
+ endm