before import netlist first time

diff --git a/pcb/reversers.pcb b/pcb/reversers.pcb
index a8f97757b3b91f0bd074dc657cf4148a4240d867..b807d9e7bac6ba3847d3b90891fb8fa07e0691d6 100644 (file)
--- a/pcb/reversers.pcb
+++ b/pcb/reversers.pcb
@@ -1,12 +1,12 @@
 # release: pcb-bin 1.99p
-# date:    Thu Aug  5 22:11:06 2004
+# date:    Thu Aug  5 22:29:55 2004
 # user:    ian (Ian Jackson)
 # host:    anarres.relativity.greenend.org.uk
 
 PCB["reversers.pcb" 1450000 360000]
 
 Grid[2500.00000000 0 0 1]
-Cursor[566815 133501 3.000000]
+Cursor[560000 66750 1.000000]
 Thermal[0.500000]
 DRC[699 400 800 800]
 Flags(0x0000000000001e51)
@@ -774,7 +774,7 @@ Symbol['~' 1200]
        SymbolLine[2000 2500 2500 2000 800]
 )
 
-Element[0x00000000 "" "RLY1" "" 500000 125000 -7500 7500 3 100 0x00000000]
+Element[0x00000000 "" "RLY0" "" 500000 125000 -25000 12500 0 100 0x00000000]
 (
        Pin[0 0 6000 3000 6000 2800 "" "1" 0x00004001]
        Pin[0 30000 6000 3000 6000 2800 "" "16" 0x00004001]
@@ -844,7 +844,7 @@ Element[0x00000000 "generic" "" "DIL 40" 645000 50000 32000 5000 3 100 0x0000000
 
        )
 
-Element[0x00000000 "" "XX1" "" 475000 30000 -5000 -10000 0 100 0x00000000]
+Element[0x00000000 "" "XX0" "" 475000 30000 -5000 -10000 0 100 0x00000000]
 (
        Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001]
        ElementLine [0 5000 -5000 0 1000]
@@ -854,7 +854,7 @@ Element[0x00000000 "" "XX1" "" 475000 30000 -5000 -10000 0 100 0x00000000]
 
        )
 
-Element[0x00000000 "" "XC1" "" 460000 30000 -5000 -10000 0 100 0x00000000]
+Element[0x00000000 "" "XC0" "" 460000 30000 -5000 -10000 0 100 0x00000000]
 (
        Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001]
        ElementLine [-5000 0 0 -5000 1000]
@@ -864,7 +864,7 @@ Element[0x00000000 "" "XC1" "" 460000 30000 -5000 -10000 0 100 0x00000000]
 
        )
 
-Element[0x00000000 "" "BR1" "" 435000 57500 12500 -5000 0 100 0x00000000]
+Element[0x00000000 "" "BR0" "" 435000 57500 12500 -5000 0 100 0x00000000]
 (
        Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001]
        Pin[42500 0 6000 2000 6006 3500 "" "2" 0x00000001]
@@ -883,7 +883,7 @@ Element[0x00000000 "" "BR1" "" 435000 57500 12500 -5000 0 100 0x00000000]
 
        )
 
-Element[0x00000000 "resistor_axial" "RS1" "500" 547500 137500 -1400 -2000 1 100 0x00000000]
+Element[0x00000000 "resistor_axial" "RS0" "500" 547500 137500 -1400 -2000 1 100 0x00000000]
 (
        Pin[0 12500 5000 3000 5600 2000 "1" "1" 0x00000101]
        Pin[0 -37500 5000 3000 5600 2000 "2" "2" 0x00000001]
@@ -896,7 +896,7 @@ Element[0x00000000 "resistor_axial" "RS1" "500" 547500 137500 -1400 -2000 1 100
 
        )
 
-Element[0x00000000 "generic" "ULN1" "DIL 18" 615000 220000 -17000 -5000 1 100 0x00000000]
+Element[0x00000000 "generic" "ULN0" "DIL 18" 615000 122500 -22500 -27000 0 100 0x00000000]
 (
        Pin[0 0 6000 3000 6600 2800 "1" "1" 0x00000101]
        Pin[0 -10000 6000 3000 6600 2800 "2" "2" 0x00000001]
@@ -945,7 +945,7 @@ Element[0x00000000 "" "BOOSTA" "" 507500 30000 -5000 -10000 0 100 0x00000000]
 
        )
 
-Element[0x00000000 "" "BOOSTB" "" 440000 30000 -5000 -10000 0 100 0x00000000]
+Element[0x00000000 "" "BOOSTB" "" 430000 30000 -5000 -10000 0 100 0x00000000]
 (
        Pin[0 0 6000 2000 6006 3500 "" "1" 0x00000001]
        ElementLine [-5000 0 0 -5000 1000]
@@ -955,7 +955,7 @@ Element[0x00000000 "" "BOOSTB" "" 440000 30000 -5000 -10000 0 100 0x00000000]
 
        )
 
-Element[0x00000000 "generic" "" "DIL 18" 585000 40000 17000 5000 3 100 0x00000000]
+Element[0x00000000 "generic" "OC0" "DIL 18" 572500 147500 10000 8000 0 100 0x00000000]
 (
        Pin[0 0 6000 3000 6600 2800 "1" "1" 0x00000101]
        Pin[0 10000 6000 3000 6600 2800 "2" "2" 0x00000001]
@@ -977,14 +977,14 @@ Element[0x00000000 "generic" "" "DIL 18" 585000 40000 17000 5000 3 100 0x0000000
        Pin[30000 0 6000 3000 6600 2800 "18" "18" 0x00000001]
        ElementLine [20000 -5000 35000 -5000 1000]
        ElementLine [-5000 -5000 10000 -5000 1000]
-       ElementLine [35000 85000 35000 -5000 1000]
+       ElementLine [35000 -5000 35000 85000 1000]
        ElementLine [-5000 85000 35000 85000 1000]
        ElementLine [-5000 -5000 -5000 85000 1000]
        ElementArc [15000 -5000 5000 5000 0 180 1000]
 
        )
 
-Element[0x00000000 "generic" "" "DIL 18" 585000 245000 17000 5000 3 100 0x00000000]
+Element[0x00000000 "generic" "OC1" "DIL 18" 572500 245000 10000 13000 0 100 0x00000000]
 (
        Pin[0 0 6000 3000 6600 2800 "1" "1" 0x00000101]
        Pin[0 10000 6000 3000 6600 2800 "2" "2" 0x00000001]
@@ -1006,11 +1006,38 @@ Element[0x00000000 "generic" "" "DIL 18" 585000 245000 17000 5000 3 100 0x000000
        Pin[30000 0 6000 3000 6600 2800 "18" "18" 0x00000001]
        ElementLine [20000 -5000 35000 -5000 1000]
        ElementLine [-5000 -5000 10000 -5000 1000]
-       ElementLine [35000 85000 35000 -5000 1000]
+       ElementLine [35000 -5000 35000 85000 1000]
        ElementLine [-5000 85000 35000 85000 1000]
        ElementLine [-5000 -5000 -5000 85000 1000]
        ElementArc [15000 -5000 5000 5000 0 180 1000]
 
+       )
+
+Element[0x00000000 "8xR-array 0.25W, common pin" "RA0" "100" 625000 150000 11000 -4000 3 100 0x00000000]
+(
+       Pin[0 0 5000 3000 5600 2000 "common" "1" 0x00000101]
+       Pin[0 10000 5000 3000 5600 2000 "1" "2" 0x00000001]
+       Pin[0 20000 5000 3000 5600 2000 "2" "3" 0x00000001]
+       Pin[0 30000 5000 3000 5600 2000 "3" "4" 0x00000001]
+       Pin[0 40000 5000 3000 5600 2000 "4" "5" 0x00000001]
+       Pin[0 50000 5000 3000 5600 2000 "5" "6" 0x00000001]
+       Pin[0 60000 5000 3000 5600 2000 "6" "7" 0x00000001]
+       Pin[0 70000 5000 3000 5600 2000 "7" "8" 0x00000001]
+       Pin[0 80000 5000 3000 5600 2000 "8" "9" 0x00000001]
+       ElementLine [-5000 5000 5000 5000 1000]
+       ElementLine [5000 0 5000 80000 2000]
+       ElementLine [-5000 0 -5000 80000 2000]
+       ElementArc [0 80000 5000 5000 0 180 2000]
+       ElementArc [0 0 5000 5000 180 180 2000]
+
+       )
+
+Element[0x00000000 "capacitor_radial" "CULN0" "200" 540000 65000 -2500 -17500 0 100 0x00000000]
+(
+       Pin[0 0 6000 3000 6600 2000 "1" "1" 0x00004101]
+       Pin[10000 0 6000 3000 6600 2000 "2" "2" 0x00004001]
+       ElementArc [5000 0 10000 10000 0 360 1000]
+
        )
 Layer(1 "component")
 (

diff --git a/reversers-netlist.pl b/reversers-netlist.pl
index e9ae2d11e72c749babbe38430ca765b8f1c9c366..6f2f60cd20a4ddaf636ffdfb0a145983b3435c3f 100755 (executable)
--- a/reversers-netlist.pl
+++ b/reversers-netlist.pl
@@ -1,10 +1,24 @@
-#!/bin/sh
+#!/usr/bin/perl
 
 $max=1;
 
+sub o ($$$@) {
+    my ($netname, $type, $fmt, @stuff) = @_;
+    my ($stuff);
+    $stuff= sprintf $fmt, @stuff;
+    print "# $netname $type $stuff\n" or die $!;
+    if (exists $net{$netname}) {
+       die "$netname $type" if $net{$netname}{Type} ne $type;
+    }
+    $net{$netname}{Type}= $type;
+    $net{$netname}{Stuff}.= $stuff;
+}
+
 @pinleft= (2..10, 14..17, 19,20);
 @pinright= reverse (21,22, 24..30, 33..37);
 
+@picpin= (@pinleft, @pinright);
+
 for $uln (0..1) {
     next if $uln*8 > $max;
     o("vrly$uln", Power, "CULN%d-2 VRLY%d ULN%d-10",
@@ -14,23 +28,34 @@ for $uln (0..1) {
     
 for $iter (0..15) {
     next if $iter > $max;
-    $i1= $iter+1;
     $wh8= $iter >> 3;
     $in8= $iter % 8;
     $wh4= $iter >> 2;
     $in4= $iter % 4;
-    o("picout$i1", Signal, "PIC-%d ULN%d-%d",
-      $pinleft[$iter],
-      $wh8+1, 8-$in8);
-    o("rlydrv$i1", Signal, "ULN%d-%d  RLY%d-1",
-      $wh8+1, 11+$in8,
-      $i1);
-    o("vrly$wh8", Power, "RLY%d-16", $i1);
-    o("boosta", Power, "RLY%d-4", $i1);
-    o("boostb", Power, "RLY%d-13", $i1);
-    o("trackc", Power, "RLY%d-6 RLY%d-9 XC%d-1", $i1, $i1, $i1);
-    o("befsenx", Power, "RLY%d-8 RLY%d-11 BR%d-4 OC%d-%d",
-      $i1, $i1, $i1, $wh4+1,$in4*2+2);
-    o("afsenx", Power, "BR%d-2 XX%d-1 RS%d-2",
-      $i1, $i1, $i1);
-    
+    o("picout$iter", Signal, "PIC-%d ULN%d-%d",
+      $picpin[$iter],
+      $wh8, 8-$in8);
+    o("rlydrv$iter", Signal, "ULN%d-%d  RLY%d-1",
+      $wh8, 11+$in8,
+      $iter);
+    o("vrly$wh8", Power, "RLY%d-16", $iter);
+    o("boosta", Power, "RLY%d-4", $iter);
+    o("boostb", Power, "RLY%d-13", $iter);
+    o("trackc", Power, "RLY%d-6 RLY%d-9 XC%d-1", $iter, $iter, $iter);
+    o("befsenx$iter", Power, "RLY%d-8 RLY%d-11 BR%d-4 OC%d-%d",
+      $iter, $iter, $iter, $wh4,$in4*2+2);
+    o("afsenx$iter", Power, "BR%d-2 XX%d-1 RS%d-2",
+      $iter, $iter, $iter);
+    o("gnd", Signal, "OC%d-%d", $wh4, 15-($in4*2));
+    o("seni$iter", Signal, "OC%d-%d PIC-%d RA%d-%d",
+      $wh4, 16-($in4*2),
+      $picpin[$iter+8], $in8+2);
+}
+
+foreach $netname (sort keys %net) {
+    printf("%s\t%s\t%s\n",
+          $netname,
+          $net{$netname}{Type},
+          $net{$netname}{Stuff})
+       or die $!;
+}