From f5a567c65347bab366524241ed989d1f69b73050 Mon Sep 17 00:00:00 2001 From: Ian Jackson Date: Tue, 17 Oct 2023 22:18:15 +0100 Subject: [PATCH] digispark-with-cable: wip progress Signed-off-by: Ian Jackson --- digispark-with-cable.scad | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/digispark-with-cable.scad b/digispark-with-cable.scad index 430ce32..617abea 100644 --- a/digispark-with-cable.scad +++ b/digispark-with-cable.scad @@ -23,7 +23,6 @@ front_wall_th = 0.75; // egress_w = 8.0; wall_y_min = -board_l - side_wall_th; // XXXX remove -main_y_min = -board_l - side_wall_th; ceil_y_min = wall_y_min - 5;; small_walls = [ @@ -47,6 +46,7 @@ cable_dia = 5; bottom_floor_th = 1.5; fit_gap_z = 0.5; +fit_gap_y = 0.25; side_x_gap = 0.5; cover_ceil_th = 0.9; @@ -58,6 +58,7 @@ top_base_z = -board_th; bottom_base_z = top_base_z - cable_space_z - bottom_floor_th;; front_y_max = front_wall_th; +main_y_min = -board_l - side_wall_th; strain_0_y_c = main_y_min - strain_w/2; strain_1_y_c = strain_0_y_c - strain_pitch_along; @@ -125,6 +126,10 @@ module Top(){ ////toplevel TopCeilPlan(); linextr(-board_th, usb_wall_h) TopMainWallsPlan(); + BothSides() + linextr(cover_wall_bot_z, top_top_z) + rectfromto([ -(board_w/2 + 0.1), total_y_min ], + [ -total_side_wall_x, main_y_min - fit_gap_y ]); } for (y_c = [strain_0_y_c, strain_1_y_c]) { -- 2.30.2