From ce3a147ba6f4283eed8e7095c894a678ed50df2c Mon Sep 17 00:00:00 2001 From: Ian Jackson Date: Tue, 17 Oct 2023 22:32:50 +0100 Subject: [PATCH] digispark-with-cable: wip progress Signed-off-by: Ian Jackson --- digispark-with-cable.scad | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/digispark-with-cable.scad b/digispark-with-cable.scad index 617abea..a489574 100644 --- a/digispark-with-cable.scad +++ b/digispark-with-cable.scad @@ -41,6 +41,10 @@ strain_pitch_along = 10; strain_groove_d = 2; strain_groove_w = 3; +cover_strap_c_d_y = 5.5; // from front of board +cover_registration_sz_y = 2; +cover_registration_sz_z = 3; + cable_space_z = 6; cable_dia = 5; bottom_floor_th = 1.5; @@ -53,6 +57,8 @@ cover_ceil_th = 0.9; // calculated +strap_w = strain_w; + top_top_z = usb_wall_h; top_base_z = -board_th; bottom_base_z = top_base_z - cable_space_z - bottom_floor_th;; @@ -71,9 +77,12 @@ cover_top_z = top_top_z + cover_ceil_th; top_side_wall_x = +board_w/2 + side_wall_th; total_side_wall_x = top_side_wall_x + side_wall_th + side_x_gap; +cover_registration_c_dy = -cover_strap_c_d_y - strap_w/2 + - side_wall_th - cover_registration_sz_y/2; + module BothSides(){ for (m=[0,1]) { - mirror([m,0]) { + mirror([m,0,0]) { children(); } } @@ -117,6 +126,21 @@ module TopMainWallsPlan() { [ +board_w/2 + side_wall_th, total_y_min ]); } +module CoverRegistrations(){ + linextr_y_xz(cover_registration_c_dy - strap_w/2, + cover_registration_c_dy + strap_w/2) { + difference(){ + rectfromto([ -total_side_wall_x, + cover_wall_bot_z - cover_registration_sz_z ], + [ +total_side_wall_x, cover_top_z ]); + hull(){ + TopElevationForCutout(); + translate([0, -20]) TopElevationForCutout(); + } + } + } +} + module Top(){ ////toplevel difference(){ union(){ @@ -194,6 +218,7 @@ module CoverMainElevation(){ module Cover(){ ////toplevel linextr_y_xz(main_y_min, front_y_max) CoverMainElevation(); + CoverRegistrations(); } module BottomDemo(){ ////toplevel -- 2.30.2