chiark / gitweb /
digispark-with-cable: drop a redundant wall
[reprap-play.git] / digispark-with-cable.scad
index 279df344ce3d0dc7fec089b8e648fa8c5c34c068..ea057cfcbc6d1e5437021e5cfbf545681a91a943 100644 (file)
@@ -5,41 +5,72 @@ include <utils.scad>
 //tongue_w = 11.92 + 0.4;
 
 usb_w = 12.01 - 0.3;
-usb_wall_w = 0.75 - 0.1;
+usb_wall_w = 0.51;
 usb_tongue_d = 8.97 - 0.2;
 usb_wall_h = 4.54 - 2.04;
-usb_ceil_th = 0.125;
+usb_ceil_th = 0.425;
 
 side_wall_th = 1.5;
 
-board_l = 13.56 + 0.2;
+board_l = 17.56 + 0.2;
 board_w = 19.14 + 0.2;
+board_th = 1.92 + 0.1;
 
-module TopSmallWallsPlan() {
+sw_to_edge = board_w/2 + 0.1;
+
+front_wall_th = 0.75;
+egress_w = 8.0;
+
+wall_y_min = -board_l - side_wall_th;;
+ceil_y_min = wall_y_min - 5;;
+
+small_walls = [
+              [ [0, 0], [-sw_to_edge, -1.0] ],
+              [ [sw_to_edge-4.5, -4.5], [sw_to_edge, -5.7] ],
+//            [ [3.0, -11.72],              [sw_to_edge, -13.38] ],
+              [ [-sw_to_edge+3.85, -14.90], [sw_to_edge, -13.38] ],
+              ];
+chip_cutout = [[ -sw_to_edge + 4.20,    -4.50 ],
+              [ -sw_to_edge + 11.95,  -11.90 ]];
+
+module BothSides(){
   for (m=[0,1]) {
     mirror([m,0]) {
-      rectfromto([ -usb_w/2,              -0.01        ],
-                [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
+      children();
     }
   }
 }
-module BothSides(){
+module TopSmallWallsPlan() {
   for (m=[0,1]) {
     mirror([m,0]) {
-      children();
+      rectfromto([ -usb_w/2,              -0.01        ],
+                [ -usb_w/2 + usb_wall_w, usb_tongue_d ]);
     }
   }
+  for (w=small_walls) {
+    rectfromto(w[0], w[1]);
+  }
 }
 module TopCeilPlan() {
-  BothSides(){
-    rectfromto([ -usb_w/2,              -0.01        ],
-              [ 0.1,                   usb_tongue_d ]);
-    rectfromto([ -board_w/2 - side_wall_th, 0            ],
-              [ 0.1,                       -board_l     ]);
+  difference(){
+    BothSides(){
+      rectfromto([ -usb_w/2,              -0.01        ],
+                [ 0.1,                   usb_tongue_d ]);
+      rectfromto([ -board_w/2 - side_wall_th, 0            ],
+                [ 0.1,                       ceil_y_min   ]);
+    }
+    rectfromto(chip_cutout[0], chip_cutout[1]);
   }
 }
 module TopMainWallsPlan() {
-  
+  BothSides(){
+    rectfromto([ -board_w/2 - side_wall_th, 0          ],
+              [ -board_w/2,                wall_y_min ]);
+    rectfromto([ -board_w/2 - side_wall_th, 0             ],
+               [ -usb_w/2,                  front_wall_th ]);
+  }
+  rectfromto([ -board_w/2 - side_wall_th + egress_w, -board_l   ],
+            [ +board_w/2 + side_wall_th,            wall_y_min ]);
 }
 
 module Top(){
@@ -47,6 +78,8 @@ module Top(){
     TopSmallWallsPlan();
   linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
     TopCeilPlan();
+  linextr(-board_th, usb_wall_h)
+    TopMainWallsPlan();
 }
 
 Top();