PageReg=&2000 : REM address of paging register
PageSize=11   : REM LOG2(size of page in bytes)
ROMSize=512*1024:REM in bytes
[
.Origin
B	ReadByte
B	WriteByte
B	Reset
B	CallLoader
DCS	"32OK" ; Iyonix compatible
.Reset
MOV	r1,#0 ; address 0 sets page reg to 0
.ReadByte
LDR	r3,PodMask
AND	r3,r11,r3 ; get hardware address from
		  ; combined address
ADD	r10,r3,#PageReg
CMP	r1,#ROMSize ; within the ROM size?
ADRGE	r0,TooBigAddress
BGE	Error
MOV	r2,r2,ASR#PageSize ; get page number
;ADD    r2,r2,#1 ; map code page 0 to ROM page 1
STRB	r2,[r10] ; write to paging register
BIC	r2,r1,#&7F<<PageSize ; get adr within page
LDRB	r0,[r3,r2,LSL#2] ; read byte from ROM
MOV	pc,r14
.WriteByte
.CallLoader
ADR	r0,NotSupp
.Error
MOV	r2,#&80000000
SUBS	r2,r2,#1 ; set V flag, 32 bit clean
MOV	pc,r14
.TooBigAddress
DCD	12345 ; find a better error number
DCS	"Podule ROM address too large"
DCB     0:ALIGN
.NotSupp
DCD	12346
DCS	"Podule loader operation not supported"
DCB	0:ALIGN
.PodMask
]
