2 * Stack-less Just-In-Time compiler
4 * Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name(void)
29 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
30 return "ARMv7" SLJIT_CPUINFO;
31 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
32 return "ARMv5" SLJIT_CPUINFO;
34 #error "Internal error: Unknown ARM architecture"
38 /* Last register + 1. */
39 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
40 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
41 #define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
42 #define TMP_PC (SLJIT_NO_REGISTERS + 4)
45 #define TMP_FREG2 (SLJIT_FLOAT_REG6 + 1)
47 /* In ARM instruction words.
48 Cache lines are usually 32 byte aligned. */
49 #define CONST_POOL_ALIGNMENT 8
50 #define CONST_POOL_EMPTY 0xffffffff
52 #define ALIGN_INSTRUCTION(ptr) \
53 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1))
54 #define MAX_DIFFERENCE(max_diff) \
55 (((max_diff) / (sljit_si)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1))
57 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
58 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 5] = {
59 0, 0, 1, 2, 10, 11, 4, 5, 6, 7, 8, 13, 3, 12, 14, 15
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
66 /* --------------------------------------------------------------------- */
67 /* Instrucion forms */
68 /* --------------------------------------------------------------------- */
70 /* The instruction includes the AL condition.
71 INST_NAME - CONDITIONAL remove this flag. */
72 #define COND_MASK 0xf0000000
73 #define CONDITIONAL 0xe0000000
74 #define PUSH_POOL 0xff000000
76 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */
83 #define BLX 0xe12fff30
85 #define CLZ 0xe16f0f10
87 #define BKPT 0xe1200070
90 #define MUL 0xe0000090
92 #define NOP 0xe1a00000
94 #define PUSH 0xe92d0000
95 #define POP 0xe8bd0000
99 #define SMULL 0xe0c00090
101 #define UMULL 0xe0800090
102 #define VABS_F32 0xeeb00ac0
103 #define VADD_F32 0xee300a00
104 #define VCMP_F32 0xeeb40a40
105 #define VDIV_F32 0xee800a00
106 #define VMOV_F32 0xeeb00a40
107 #define VMRS 0xeef1fa10
108 #define VMUL_F32 0xee200a00
109 #define VNEG_F32 0xeeb10a40
110 #define VSTR_F32 0xed000a00
111 #define VSUB_F32 0xee300a40
113 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
114 /* Arm v7 specific instructions. */
115 #define MOVW 0xe3000000
116 #define MOVT 0xe3400000
117 #define SXTB 0xe6af0070
118 #define SXTH 0xe6bf0070
119 #define UXTB 0xe6ef0070
120 #define UXTH 0xe6ff0070
123 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
125 static sljit_si push_cpool(struct sljit_compiler *compiler)
127 /* Pushing the constant pool into the instruction stream. */
133 /* The label could point the address after the constant pool. */
134 if (compiler->last_label && compiler->last_label->size == compiler->size)
135 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1;
137 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE);
138 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
141 *inst = 0xff000000 | compiler->cpool_fill;
143 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) {
144 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
150 cpool_ptr = compiler->cpool;
151 cpool_end = cpool_ptr + compiler->cpool_fill;
152 while (cpool_ptr < cpool_end) {
153 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
156 *inst = *cpool_ptr++;
158 compiler->cpool_diff = CONST_POOL_EMPTY;
159 compiler->cpool_fill = 0;
160 return SLJIT_SUCCESS;
163 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
167 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
168 FAIL_IF(push_cpool(compiler));
170 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
174 return SLJIT_SUCCESS;
177 static sljit_si push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
180 sljit_uw cpool_index = CPOOL_SIZE;
183 sljit_ub* cpool_unique_ptr;
185 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
186 FAIL_IF(push_cpool(compiler));
187 else if (compiler->cpool_fill > 0) {
188 cpool_ptr = compiler->cpool;
189 cpool_end = cpool_ptr + compiler->cpool_fill;
190 cpool_unique_ptr = compiler->cpool_unique;
192 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) {
193 cpool_index = cpool_ptr - compiler->cpool;
198 } while (cpool_ptr < cpool_end);
201 if (cpool_index == CPOOL_SIZE) {
202 /* Must allocate a new entry in the literal pool. */
203 if (compiler->cpool_fill < CPOOL_SIZE) {
204 cpool_index = compiler->cpool_fill;
205 compiler->cpool_fill++;
208 FAIL_IF(push_cpool(compiler));
210 compiler->cpool_fill = 1;
214 SLJIT_ASSERT((inst & 0xfff) == 0);
215 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
218 *ptr = inst | cpool_index;
220 compiler->cpool[cpool_index] = literal;
221 compiler->cpool_unique[cpool_index] = 0;
222 if (compiler->cpool_diff == CONST_POOL_EMPTY)
223 compiler->cpool_diff = compiler->size;
224 return SLJIT_SUCCESS;
227 static sljit_si push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
230 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE))
231 FAIL_IF(push_cpool(compiler));
233 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0);
234 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
237 *ptr = inst | compiler->cpool_fill;
239 compiler->cpool[compiler->cpool_fill] = literal;
240 compiler->cpool_unique[compiler->cpool_fill] = 1;
241 compiler->cpool_fill++;
242 if (compiler->cpool_diff == CONST_POOL_EMPTY)
243 compiler->cpool_diff = compiler->size;
244 return SLJIT_SUCCESS;
247 static SLJIT_INLINE sljit_si prepare_blx(struct sljit_compiler *compiler)
249 /* Place for at least two instruction (doesn't matter whether the first has a literal). */
250 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088)))
251 return push_cpool(compiler);
252 return SLJIT_SUCCESS;
255 static SLJIT_INLINE sljit_si emit_blx(struct sljit_compiler *compiler)
257 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */
258 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092));
259 return push_inst(compiler, BLX | RM(TMP_REG1));
262 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size)
266 sljit_uw counter = 0;
267 sljit_uw* clear_const_pool = const_pool;
268 sljit_uw* clear_const_pool_end = const_pool + cpool_size;
270 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT);
271 /* Set unused flag for all literals in the constant pool.
272 I.e.: unused literals can belong to branches, which can be encoded as B or BL.
273 We can "compress" the constant pool by discarding these literals. */
274 while (clear_const_pool < clear_const_pool_end)
275 *clear_const_pool++ = (sljit_uw)(-1);
277 while (last_pc_patch < code_ptr) {
278 /* Data transfer instruction with Rn == r15. */
279 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) {
280 diff = const_pool - last_pc_patch;
281 ind = (*last_pc_patch) & 0xfff;
283 /* Must be a load instruction with immediate offset. */
284 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20)));
285 if ((sljit_si)const_pool[ind] < 0) {
286 const_pool[ind] = counter;
291 ind = const_pool[ind];
293 SLJIT_ASSERT(diff >= 1);
294 if (diff >= 2 || ind > 0) {
295 diff = (diff + ind - 2) << 2;
296 SLJIT_ASSERT(diff <= 0xfff);
297 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff;
300 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004;
307 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */
308 struct future_patch {
309 struct future_patch* next;
314 static SLJIT_INLINE sljit_si resolve_const_pool_index(struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr)
317 struct future_patch *curr_patch, *prev_patch;
319 /* Using the values generated by patch_pc_relative_loads. */
321 value = (sljit_si)cpool_start_address[cpool_current_index];
323 curr_patch = *first_patch;
327 value = (sljit_si)cpool_start_address[cpool_current_index];
330 if ((sljit_uw)curr_patch->index == cpool_current_index) {
331 value = curr_patch->value;
333 prev_patch->next = curr_patch->next;
335 *first_patch = curr_patch->next;
336 SLJIT_FREE(curr_patch);
339 prev_patch = curr_patch;
340 curr_patch = curr_patch->next;
345 if ((sljit_uw)value > cpool_current_index) {
346 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch));
348 while (*first_patch) {
349 curr_patch = *first_patch;
350 *first_patch = (*first_patch)->next;
351 SLJIT_FREE(curr_patch);
353 return SLJIT_ERR_ALLOC_FAILED;
355 curr_patch->next = *first_patch;
356 curr_patch->index = value;
357 curr_patch->value = cpool_start_address[value];
358 *first_patch = curr_patch;
360 cpool_start_address[value] = *buf_ptr;
362 return SLJIT_SUCCESS;
367 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
371 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
375 return SLJIT_SUCCESS;
378 static SLJIT_INLINE sljit_si emit_imm(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm)
380 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)));
381 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff));
386 static SLJIT_INLINE sljit_si detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code)
390 if (jump->flags & SLJIT_REWRITABLE_JUMP)
393 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
394 if (jump->flags & IS_BL)
397 if (jump->flags & JUMP_ADDR)
398 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2));
400 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
401 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2));
404 /* Branch to Thumb code has not been optimized yet. */
408 if (jump->flags & IS_BL) {
409 if (diff <= 0x01ffffff && diff >= -0x02000000) {
410 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK);
411 jump->flags |= PATCH_B;
416 if (diff <= 0x01ffffff && diff >= -0x02000000) {
417 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK);
418 jump->flags |= PATCH_B;
422 if (jump->flags & JUMP_ADDR)
423 diff = ((sljit_sw)jump->u.target - (sljit_sw)code_ptr);
425 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
426 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)code_ptr);
429 /* Branch to Thumb code has not been optimized yet. */
433 if (diff <= 0x01ffffff && diff >= -0x02000000) {
435 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK);
436 jump->flags |= PATCH_B;
443 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, sljit_si flush)
445 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
446 sljit_uw *ptr = (sljit_uw*)addr;
447 sljit_uw *inst = (sljit_uw*)ptr[0];
448 sljit_uw mov_pc = ptr[1];
449 sljit_si bl = (mov_pc & 0x0000f000) != RD(TMP_PC);
450 sljit_sw diff = (sljit_sw)(((sljit_sw)new_addr - (sljit_sw)(inst + 2)) >> 2);
452 if (diff <= 0x7fffff && diff >= -0x800000) {
453 /* Turn to branch. */
455 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff);
457 SLJIT_CACHE_FLUSH(inst, inst + 1);
460 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff);
463 SLJIT_CACHE_FLUSH(inst, inst + 2);
467 /* Get the position of the constant. */
468 if (mov_pc & (1 << 23))
469 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2;
473 if (*inst != mov_pc) {
477 SLJIT_CACHE_FLUSH(inst, inst + 1);
480 inst[1] = BLX | RM(TMP_REG1);
482 SLJIT_CACHE_FLUSH(inst, inst + 2);
489 sljit_uw *inst = (sljit_uw*)addr;
490 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
491 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff);
492 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff);
494 SLJIT_CACHE_FLUSH(inst, inst + 2);
499 static sljit_uw get_imm(sljit_uw imm);
501 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_sw new_constant, sljit_si flush)
503 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
504 sljit_uw *ptr = (sljit_uw*)addr;
505 sljit_uw *inst = (sljit_uw*)ptr[0];
506 sljit_uw ldr_literal = ptr[1];
509 src2 = get_imm(new_constant);
511 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2;
513 SLJIT_CACHE_FLUSH(inst, inst + 1);
518 src2 = get_imm(~new_constant);
520 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2;
522 SLJIT_CACHE_FLUSH(inst, inst + 1);
527 if (ldr_literal & (1 << 23))
528 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2;
532 if (*inst != ldr_literal) {
535 SLJIT_CACHE_FLUSH(inst, inst + 1);
540 sljit_uw *inst = (sljit_uw*)addr;
541 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
542 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff);
543 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff);
545 SLJIT_CACHE_FLUSH(inst, inst + 2);
550 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
552 struct sljit_memory_fragment *buf;
559 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
561 sljit_uw cpool_skip_alignment;
562 sljit_uw cpool_current_index;
563 sljit_uw *cpool_start_address;
564 sljit_uw *last_pc_patch;
565 struct future_patch *first_patch;
568 struct sljit_label *label;
569 struct sljit_jump *jump;
570 struct sljit_const *const_;
573 check_sljit_generate_code(compiler);
574 reverse_buf(compiler);
576 /* Second code generation pass. */
577 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
578 size = compiler->size + (compiler->patches << 1);
579 if (compiler->cpool_fill > 0)
580 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1;
582 size = compiler->size;
584 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw));
585 PTR_FAIL_WITH_EXEC_IF(code);
588 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
590 cpool_skip_alignment = 0;
591 cpool_current_index = 0;
592 cpool_start_address = NULL;
594 last_pc_patch = code;
600 label = compiler->labels;
601 jump = compiler->jumps;
602 const_ = compiler->consts;
604 if (label && label->size == 0) {
605 label->addr = (sljit_uw)code;
611 buf_ptr = (sljit_uw*)buf->memory;
612 buf_end = buf_ptr + (buf->used_size >> 2);
615 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
616 if (cpool_size > 0) {
617 if (cpool_skip_alignment > 0) {
619 cpool_skip_alignment--;
622 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
623 SLJIT_FREE_EXEC(code);
624 compiler->error = SLJIT_ERR_ALLOC_FAILED;
628 if (++cpool_current_index >= cpool_size) {
629 SLJIT_ASSERT(!first_patch);
631 if (label && label->size == word_count) {
632 /* Points after the current instruction. */
633 label->addr = (sljit_uw)code_ptr;
634 label->size = code_ptr - code;
640 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) {
642 *code_ptr = *buf_ptr++;
643 /* These structures are ordered by their address. */
644 SLJIT_ASSERT(!label || label->size >= word_count);
645 SLJIT_ASSERT(!jump || jump->addr >= word_count);
646 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
647 if (jump && jump->addr == word_count) {
648 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
649 if (detect_jump_type(jump, code_ptr, code))
651 jump->addr = (sljit_uw)code_ptr;
653 jump->addr = (sljit_uw)(code_ptr - 2);
654 if (detect_jump_type(jump, code_ptr, code))
659 if (label && label->size == word_count) {
660 /* code_ptr can be affected above. */
661 label->addr = (sljit_uw)(code_ptr + 1);
662 label->size = (code_ptr + 1) - code;
665 if (const_ && const_->addr == word_count) {
666 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
667 const_->addr = (sljit_uw)code_ptr;
669 const_->addr = (sljit_uw)(code_ptr - 1);
671 const_ = const_->next;
674 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
677 /* Fortunately, no need to shift. */
678 cpool_size = *buf_ptr++ & ~PUSH_POOL;
679 SLJIT_ASSERT(cpool_size > 0);
680 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1);
681 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size);
682 if (cpool_current_index > 0) {
683 /* Unconditional branch. */
684 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL);
685 code_ptr = cpool_start_address + cpool_current_index;
687 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1;
688 cpool_current_index = 0;
689 last_pc_patch = code_ptr;
692 } while (buf_ptr < buf_end);
696 SLJIT_ASSERT(!label);
698 SLJIT_ASSERT(!const_);
700 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
701 SLJIT_ASSERT(cpool_size == 0);
702 if (compiler->cpool_fill > 0) {
703 cpool_start_address = ALIGN_INSTRUCTION(code_ptr);
704 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill);
705 if (cpool_current_index > 0)
706 code_ptr = cpool_start_address + cpool_current_index;
708 buf_ptr = compiler->cpool;
709 buf_end = buf_ptr + compiler->cpool_fill;
710 cpool_current_index = 0;
711 while (buf_ptr < buf_end) {
712 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
713 SLJIT_FREE_EXEC(code);
714 compiler->error = SLJIT_ERR_ALLOC_FAILED;
718 cpool_current_index++;
720 SLJIT_ASSERT(!first_patch);
724 jump = compiler->jumps;
726 buf_ptr = (sljit_uw*)jump->addr;
728 if (jump->flags & PATCH_B) {
729 if (!(jump->flags & JUMP_ADDR)) {
730 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
731 SLJIT_ASSERT(((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
732 *buf_ptr |= (((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
735 SLJIT_ASSERT(((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
736 *buf_ptr |= (((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
739 else if (jump->flags & SLJIT_REWRITABLE_JUMP) {
740 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
741 jump->addr = (sljit_uw)code_ptr;
742 code_ptr[0] = (sljit_uw)buf_ptr;
743 code_ptr[1] = *buf_ptr;
744 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
747 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
751 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
752 if (jump->flags & IS_BL)
754 if (*buf_ptr & (1 << 23))
755 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
758 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
760 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
766 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
767 const_ = compiler->consts;
769 buf_ptr = (sljit_uw*)const_->addr;
770 const_->addr = (sljit_uw)code_ptr;
772 code_ptr[0] = (sljit_uw)buf_ptr;
773 code_ptr[1] = *buf_ptr;
774 if (*buf_ptr & (1 << 23))
775 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
778 /* Set the value again (can be a simple constant). */
779 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0);
782 const_ = const_->next;
786 SLJIT_ASSERT(code_ptr - code <= (sljit_si)size);
788 compiler->error = SLJIT_ERR_COMPILED;
789 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uw);
790 SLJIT_CACHE_FLUSH(code, code_ptr);
794 /* --------------------------------------------------------------------- */
796 /* --------------------------------------------------------------------- */
798 /* emit_op inp_flags.
799 WRITE_BACK must be the first, since it is a flag. */
800 #define WRITE_BACK 0x01
801 #define ALLOW_IMM 0x02
802 #define ALLOW_INV_IMM 0x04
803 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM)
804 #define ARG_TEST 0x08
806 /* Creates an index in data_transfer_insts array. */
807 #define WORD_DATA 0x00
808 #define BYTE_DATA 0x10
809 #define HALF_DATA 0x20
810 #define SIGNED_DATA 0x40
811 #define LOAD_DATA 0x80
813 #define EMIT_INSTRUCTION(inst) \
814 FAIL_IF(push_inst(compiler, (inst)))
817 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \
818 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2))
820 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
821 sljit_si dst, sljit_sw dstw,
822 sljit_si src1, sljit_sw src1w,
823 sljit_si src2, sljit_sw src2w);
825 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_enter(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size)
831 check_sljit_emit_enter(compiler, args, scratches, saveds, local_size);
833 compiler->scratches = scratches;
834 compiler->saveds = saveds;
835 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
836 compiler->logical_local_size = local_size;
839 /* Push saved registers, temporary registers
840 stmdb sp!, {..., lr} */
841 push = PUSH | (1 << 14);
856 EMIT_INSTRUCTION(push);
858 /* Stack must be aligned to 8 bytes: */
859 size = (1 + saveds) * sizeof(sljit_uw);
861 size += (scratches - 3) * sizeof(sljit_uw);
863 local_size = (local_size + 7) & ~7;
865 compiler->local_size = local_size;
867 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, local_size));
870 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG1)));
872 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG2, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2)));
874 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG3, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG3)));
876 return SLJIT_SUCCESS;
879 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_context(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size)
884 check_sljit_set_context(compiler, args, scratches, saveds, local_size);
886 compiler->scratches = scratches;
887 compiler->saveds = saveds;
888 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
889 compiler->logical_local_size = local_size;
892 size = (1 + saveds) * sizeof(sljit_uw);
894 size += (scratches - 3) * sizeof(sljit_uw);
896 local_size = (local_size + 7) & ~7;
898 compiler->local_size = local_size;
901 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_return(struct sljit_compiler *compiler, sljit_si op, sljit_si src, sljit_sw srcw)
906 check_sljit_emit_return(compiler, op, src, srcw);
908 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
910 if (compiler->local_size > 0)
911 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, compiler->local_size));
913 pop = POP | (1 << 15);
914 /* Push saved registers, temporary registers
915 ldmia sp!, {..., pc} */
916 if (compiler->scratches >= 5)
918 if (compiler->scratches >= 4)
920 if (compiler->saveds >= 5)
922 if (compiler->saveds >= 4)
924 if (compiler->saveds >= 3)
926 if (compiler->saveds >= 2)
928 if (compiler->saveds >= 1)
931 return push_inst(compiler, pop);
934 /* --------------------------------------------------------------------- */
936 /* --------------------------------------------------------------------- */
938 /* s/l - store/load (1 bit)
939 u/s - signed/unsigned (1 bit)
940 w/b/h/N - word/byte/half/NOT allowed (2 bit)
941 It contans 16 items, but not all are different. */
943 static sljit_sw data_transfer_insts[16] = {
944 /* s u w */ 0xe5000000 /* str */,
945 /* s u b */ 0xe5400000 /* strb */,
946 /* s u h */ 0xe10000b0 /* strh */,
947 /* s u N */ 0x00000000 /* not allowed */,
948 /* s s w */ 0xe5000000 /* str */,
949 /* s s b */ 0xe5400000 /* strb */,
950 /* s s h */ 0xe10000b0 /* strh */,
951 /* s s N */ 0x00000000 /* not allowed */,
953 /* l u w */ 0xe5100000 /* ldr */,
954 /* l u b */ 0xe5500000 /* ldrb */,
955 /* l u h */ 0xe11000b0 /* ldrh */,
956 /* l u N */ 0x00000000 /* not allowed */,
957 /* l s w */ 0xe5100000 /* ldr */,
958 /* l s b */ 0xe11000d0 /* ldrsb */,
959 /* l s h */ 0xe11000f0 /* ldrsh */,
960 /* l s N */ 0x00000000 /* not allowed */,
963 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \
964 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2))
965 /* Normal ldr/str instruction.
966 Type2: ldrsb, ldrh, ldrsh */
967 #define IS_TYPE1_TRANSFER(type) \
968 (data_transfer_insts[(type) >> 4] & 0x04000000)
969 #define TYPE2_TRANSFER_IMM(imm) \
970 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22))
973 /* Arguments are swapped. */
974 #define ARGS_SWAPPED 0x01
975 /* Inverted immediate. */
977 /* Source and destination is register. */
978 #define REG_DEST 0x04
979 #define REG_SOURCE 0x08
980 /* One instruction is enough. */
981 #define FAST_DEST 0x10
982 /* Multiple instructions are required. */
983 #define SLOW_DEST 0x20
984 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */
985 #define SET_FLAGS (1 << 20)
988 src2: reg or imm (if allowed)
989 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */
990 #define SRC2_IMM (1 << 25)
992 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \
993 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2)))
995 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \
996 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2))
998 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \
999 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \
1000 if (compiler->shift_imm != 0x20) { \
1001 SLJIT_ASSERT(src1 == TMP_REG1); \
1002 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \
1003 if (compiler->shift_imm != 0) \
1004 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \
1005 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, reg_map[src2])); \
1007 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1])));
1009 static SLJIT_INLINE sljit_si emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags,
1010 sljit_si dst, sljit_si src1, sljit_si src2)
1014 switch (GET_OPCODE(op)) {
1016 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1018 if (src2 & SRC2_IMM) {
1019 if (flags & INV_IMM)
1020 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1021 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1023 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]);
1025 return SLJIT_SUCCESS;
1029 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1030 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1031 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1032 if (op == SLJIT_MOV_UB)
1033 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff));
1034 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2]));
1035 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_UB ? 0x20 : 0x40) | reg_map[dst]));
1037 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2));
1040 else if (dst != src2) {
1041 SLJIT_ASSERT(src2 & SRC2_IMM);
1042 if (flags & INV_IMM)
1043 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1044 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1046 return SLJIT_SUCCESS;
1050 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1051 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1052 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1053 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2]));
1054 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_UH ? 0x20 : 0x40) | reg_map[dst]));
1056 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2));
1059 else if (dst != src2) {
1060 SLJIT_ASSERT(src2 & SRC2_IMM);
1061 if (flags & INV_IMM)
1062 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1063 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1065 return SLJIT_SUCCESS;
1068 if (src2 & SRC2_IMM) {
1069 if (flags & INV_IMM)
1070 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1071 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1073 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2));
1076 SLJIT_ASSERT(!(flags & INV_IMM));
1077 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1078 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2)));
1079 if (flags & SET_FLAGS)
1080 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM);
1081 return SLJIT_SUCCESS;
1084 SLJIT_ASSERT(!(flags & INV_IMM));
1085 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP);
1088 SLJIT_ASSERT(!(flags & INV_IMM));
1089 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP);
1092 SLJIT_ASSERT(!(flags & INV_IMM));
1093 if (!(flags & ARGS_SWAPPED))
1094 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP);
1095 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP);
1098 SLJIT_ASSERT(!(flags & INV_IMM));
1099 if (!(flags & ARGS_SWAPPED))
1100 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP);
1101 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP);
1104 SLJIT_ASSERT(!(flags & INV_IMM));
1105 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1106 if (SLJIT_UNLIKELY(op & SLJIT_SET_O))
1107 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12);
1109 mul_inst = MUL | (reg_map[dst] << 16);
1112 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2]));
1113 else if (dst != src1)
1114 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1]));
1116 /* Rm and Rd must not be the same register. */
1117 SLJIT_ASSERT(dst != TMP_REG1);
1118 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2])));
1119 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1]));
1122 if (!(op & SLJIT_SET_O))
1123 return SLJIT_SUCCESS;
1125 /* We need to use TMP_REG3. */
1126 compiler->cache_arg = 0;
1127 compiler->cache_argw = 0;
1128 /* cmp TMP_REG2, dst asr #31. */
1129 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0));
1132 if (!(flags & INV_IMM))
1133 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP);
1134 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP);
1137 SLJIT_ASSERT(!(flags & INV_IMM));
1138 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP);
1141 SLJIT_ASSERT(!(flags & INV_IMM));
1142 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP);
1145 EMIT_SHIFT_INS_AND_RETURN(0);
1148 EMIT_SHIFT_INS_AND_RETURN(1);
1151 EMIT_SHIFT_INS_AND_RETURN(2);
1153 SLJIT_ASSERT_STOP();
1154 return SLJIT_SUCCESS;
1157 #undef EMIT_DATA_PROCESS_INS_AND_RETURN
1158 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN
1159 #undef EMIT_SHIFT_INS_AND_RETURN
1161 /* Tests whether the immediate can be stored in the 12 bit imm field.
1162 Returns with 0 if not possible. */
1163 static sljit_uw get_imm(sljit_uw imm)
1168 return SRC2_IMM | imm;
1170 if (!(imm & 0xff000000)) {
1175 imm = (imm << 24) | (imm >> 8);
1179 if (!(imm & 0xff000000)) {
1184 if (!(imm & 0xf0000000)) {
1189 if (!(imm & 0xc0000000)) {
1194 if (!(imm & 0x00ffffff))
1195 return SRC2_IMM | (imm >> 24) | (rol << 8);
1200 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1201 static sljit_si generate_int(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm, sljit_si positive)
1208 /* Step1: Search a zero byte (8 continous zero bit). */
1212 if (!(imm & mask)) {
1213 /* Rol imm by rol. */
1214 imm = (imm << rol) | (imm >> (32 - rol));
1215 /* Calculate arm rol. */
1216 rol = 4 + (rol >> 1);
1223 imm = (imm << 8) | (imm >> 24);
1227 if (!(imm & mask)) {
1228 /* Rol imm by rol. */
1229 imm = (imm << rol) | (imm >> (32 - rol));
1230 /* Calculate arm rol. */
1231 rol = (rol >> 1) - 8;
1243 /* The low 8 bit must be zero. */
1244 SLJIT_ASSERT(!(imm & 0xff));
1246 if (!(imm & 0xff000000)) {
1247 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
1248 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
1250 else if (imm & 0xc0000000) {
1251 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1255 if (!(imm & 0xff000000)) {
1260 if (!(imm & 0xf0000000)) {
1265 if (!(imm & 0xc0000000)) {
1270 if (!(imm & 0x00ffffff))
1271 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1276 if (!(imm & 0xf0000000)) {
1281 if (!(imm & 0xc0000000)) {
1286 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1290 if (!(imm & 0xf0000000)) {
1295 if (!(imm & 0xc0000000)) {
1300 if (!(imm & 0x00ffffff))
1301 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1306 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1));
1307 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2));
1312 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm)
1316 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1317 if (!(imm & ~0xffff))
1318 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff));
1321 /* Create imm by 1 inst. */
1324 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp));
1325 return SLJIT_SUCCESS;
1328 tmp = get_imm(~imm);
1330 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp));
1331 return SLJIT_SUCCESS;
1334 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1335 /* Create imm by 2 inst. */
1336 FAIL_IF(generate_int(compiler, reg, imm, 1));
1337 FAIL_IF(generate_int(compiler, reg, ~imm, 0));
1340 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm);
1342 return emit_imm(compiler, reg, imm);
1346 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
1347 static sljit_si emit_set_delta(struct sljit_compiler *compiler, sljit_si dst, sljit_si reg, sljit_sw value)
1350 value = get_imm(value);
1352 return push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, dst, reg, value));
1355 value = get_imm(-value);
1357 return push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, dst, reg, value));
1359 return SLJIT_ERR_UNSUPPORTED;
1362 /* Can perform an operation using at most 1 instruction. */
1363 static sljit_si getput_arg_fast(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1367 if (arg & SLJIT_IMM) {
1368 imm = get_imm(argw);
1370 if (inp_flags & ARG_TEST)
1372 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm));
1375 imm = get_imm(~argw);
1377 if (inp_flags & ARG_TEST)
1379 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm));
1385 SLJIT_ASSERT(arg & SLJIT_MEM);
1387 /* Fast loads/stores. */
1388 if (!(arg & REG_MASK))
1391 if (arg & OFFS_REG_MASK) {
1392 if ((argw & 0x3) != 0 && !IS_TYPE1_TRANSFER(inp_flags))
1395 if (inp_flags & ARG_TEST)
1397 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK,
1398 RM(OFFS_REG(arg)) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7)));
1402 if (IS_TYPE1_TRANSFER(inp_flags)) {
1403 if (argw >= 0 && argw <= 0xfff) {
1404 if (inp_flags & ARG_TEST)
1406 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, argw));
1409 if (argw < 0 && argw >= -0xfff) {
1410 if (inp_flags & ARG_TEST)
1412 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, -argw));
1417 if (argw >= 0 && argw <= 0xff) {
1418 if (inp_flags & ARG_TEST)
1420 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)));
1423 if (argw < 0 && argw >= -0xff) {
1424 if (inp_flags & ARG_TEST)
1427 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)));
1435 /* See getput_arg below.
1436 Note: can_cache is called only for binary operators. Those
1437 operators always uses word arguments without write back. */
1438 static sljit_si can_cache(sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1440 /* Immediate caching is not supported as it would be an operation on constant arguments. */
1441 if (arg & SLJIT_IMM)
1444 /* Always a simple operation. */
1445 if (arg & OFFS_REG_MASK)
1448 if (!(arg & REG_MASK)) {
1449 /* Immediate access. */
1450 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1455 if (argw <= 0xfffff && argw >= -0xfffff)
1458 if (argw == next_argw && (next_arg & SLJIT_MEM))
1461 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1467 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \
1468 if (max_delta & 0xf00) \
1469 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \
1471 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm))));
1473 #define TEST_WRITE_BACK() \
1474 if (inp_flags & WRITE_BACK) { \
1475 tmp_r = arg & REG_MASK; \
1476 if (reg == tmp_r) { \
1477 /* This can only happen for stores */ \
1478 /* since ldr reg, [reg, ...]! has no meaning */ \
1479 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \
1480 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg))); \
1485 /* Emit the necessary instructions. See can_cache above. */
1486 static sljit_si getput_arg(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1493 if (arg & SLJIT_IMM) {
1494 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1495 return load_immediate(compiler, reg, argw);
1498 SLJIT_ASSERT(arg & SLJIT_MEM);
1500 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3;
1501 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff;
1503 if ((arg & REG_MASK) == SLJIT_UNUSED) {
1504 /* Write back is not used. */
1505 imm = (sljit_uw)(argw - compiler->cache_argw);
1506 if ((compiler->cache_arg & SLJIT_IMM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1507 if (imm <= (sljit_uw)max_delta) {
1509 argw = argw - compiler->cache_argw;
1513 argw = compiler->cache_argw - argw;
1516 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw);
1517 return SLJIT_SUCCESS;
1520 /* With write back, we can create some sophisticated loads, but
1521 it is hard to decide whether we should convert downward (0s) or upward (1s). */
1522 imm = (sljit_uw)(argw - next_argw);
1523 if ((next_arg & SLJIT_MEM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1524 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1526 compiler->cache_arg = SLJIT_IMM;
1527 compiler->cache_argw = argw;
1531 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1532 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0);
1533 return SLJIT_SUCCESS;
1536 if (arg & OFFS_REG_MASK) {
1537 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00));
1538 if (inp_flags & WRITE_BACK)
1539 tmp_r = arg & REG_MASK;
1540 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)));
1541 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0)));
1542 return SLJIT_SUCCESS;
1545 imm = (sljit_uw)(argw - compiler->cache_argw);
1546 if (compiler->cache_arg == arg && imm <= (sljit_uw)max_delta) {
1547 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1548 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, imm);
1549 return SLJIT_SUCCESS;
1551 if (compiler->cache_arg == arg && imm >= (sljit_uw)-max_delta) {
1552 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1553 imm = (sljit_uw)-(sljit_sw)imm;
1554 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, imm);
1555 return SLJIT_SUCCESS;
1558 imm = get_imm(argw & ~max_delta);
1561 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, imm));
1562 GETPUT_ARG_DATA_TRANSFER(1, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1563 return SLJIT_SUCCESS;
1566 imm = get_imm(-argw & ~max_delta);
1570 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, tmp_r, arg & REG_MASK, imm));
1571 GETPUT_ARG_DATA_TRANSFER(0, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1572 return SLJIT_SUCCESS;
1575 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) {
1577 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1578 return SLJIT_SUCCESS;
1581 if (argw == next_argw && (next_arg & SLJIT_MEM)) {
1582 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1583 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1585 compiler->cache_arg = SLJIT_IMM;
1586 compiler->cache_argw = argw;
1589 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1590 return SLJIT_SUCCESS;
1593 imm = (sljit_uw)(argw - next_argw);
1594 if (arg == next_arg && !(inp_flags & WRITE_BACK) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1595 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1596 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1597 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & REG_MASK]));
1599 compiler->cache_arg = arg;
1600 compiler->cache_argw = argw;
1602 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0);
1603 return SLJIT_SUCCESS;
1606 if ((arg & REG_MASK) == tmp_r) {
1607 compiler->cache_arg = SLJIT_IMM;
1608 compiler->cache_argw = argw;
1612 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1613 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1614 return SLJIT_SUCCESS;
1617 static SLJIT_INLINE sljit_si emit_op_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1619 if (getput_arg_fast(compiler, flags, reg, arg, argw))
1620 return compiler->error;
1621 compiler->cache_arg = 0;
1622 compiler->cache_argw = 0;
1623 return getput_arg(compiler, flags, reg, arg, argw, 0, 0);
1626 static SLJIT_INLINE sljit_si emit_op_mem2(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg1, sljit_sw arg1w, sljit_si arg2, sljit_sw arg2w)
1628 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1629 return compiler->error;
1630 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1633 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
1634 sljit_si dst, sljit_sw dstw,
1635 sljit_si src1, sljit_sw src1w,
1636 sljit_si src2, sljit_sw src2w)
1638 /* arg1 goes to TMP_REG1 or src reg
1639 arg2 goes to TMP_REG2, imm or src reg
1640 TMP_REG3 can be used for caching
1641 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1643 /* We prefers register and simple consts. */
1646 sljit_si src2_r = 0;
1647 sljit_si sugg_src2_r = TMP_REG2;
1648 sljit_si flags = GET_FLAGS(op) ? SET_FLAGS : 0;
1650 compiler->cache_arg = 0;
1651 compiler->cache_argw = 0;
1653 /* Destination check. */
1654 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) {
1655 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
1656 return SLJIT_SUCCESS;
1659 else if (FAST_IS_REG(dst)) {
1662 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1663 sugg_src2_r = dst_r;
1666 SLJIT_ASSERT(dst & SLJIT_MEM);
1667 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1678 if (FAST_IS_REG(src1))
1680 else if (FAST_IS_REG(src2)) {
1681 flags |= ARGS_SWAPPED;
1686 else do { /* do { } while(0) is used because of breaks. */
1688 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) {
1689 /* The second check will generate a hit. */
1690 src2_r = get_imm(src1w);
1692 flags |= ARGS_SWAPPED;
1697 if (inp_flags & ALLOW_INV_IMM) {
1698 src2_r = get_imm(~src1w);
1700 flags |= ARGS_SWAPPED | INV_IMM;
1706 if (GET_OPCODE(op) == SLJIT_ADD) {
1707 src2_r = get_imm(-src1w);
1709 /* Note: ARGS_SWAPPED is intentionally not applied! */
1712 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1718 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) {
1719 FAIL_IF(compiler->error);
1726 if (FAST_IS_REG(src2)) {
1728 flags |= REG_SOURCE;
1729 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1732 else do { /* do { } while(0) is used because of breaks. */
1733 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) {
1734 src2_r = get_imm(src2w);
1737 if (inp_flags & ALLOW_INV_IMM) {
1738 src2_r = get_imm(~src2w);
1744 if (GET_OPCODE(op) == SLJIT_ADD) {
1745 src2_r = get_imm(-src2w);
1747 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1748 flags &= ~ARGS_SWAPPED;
1752 if (GET_OPCODE(op) == SLJIT_SUB && !(flags & ARGS_SWAPPED)) {
1753 src2_r = get_imm(-src2w);
1755 op = SLJIT_ADD | GET_ALL_FLAGS(op);
1756 flags &= ~ARGS_SWAPPED;
1763 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) {
1764 FAIL_IF(compiler->error);
1765 src2_r = sugg_src2_r;
1770 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero.
1771 If they are zero, they must not be registers. */
1772 if (src1_r == 0 && src2_r == 0 && dst_r == 0) {
1773 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1774 SLJIT_ASSERT(!(flags & ARGS_SWAPPED));
1775 flags |= ARGS_SWAPPED;
1776 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w));
1777 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw));
1780 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1781 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw));
1786 else if (src1_r == 0 && src2_r == 0) {
1787 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1790 else if (src1_r == 0 && dst_r == 0) {
1791 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw));
1794 else if (src2_r == 0 && dst_r == 0) {
1795 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw));
1796 src2_r = sugg_src2_r;
1803 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0));
1808 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0));
1809 src2_r = sugg_src2_r;
1812 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
1814 if (flags & (FAST_DEST | SLOW_DEST)) {
1815 if (flags & FAST_DEST)
1816 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw));
1818 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0));
1820 return SLJIT_SUCCESS;
1827 #if defined(__GNUC__)
1828 extern unsigned int __aeabi_uidivmod(unsigned int numerator, unsigned int denominator);
1829 extern int __aeabi_idivmod(int numerator, int denominator);
1831 #error "Software divmod functions are needed"
1838 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op0(struct sljit_compiler *compiler, sljit_si op)
1841 check_sljit_emit_op0(compiler, op);
1843 op = GET_OPCODE(op);
1845 case SLJIT_BREAKPOINT:
1846 EMIT_INSTRUCTION(BKPT);
1849 EMIT_INSTRUCTION(NOP);
1853 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1854 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1855 | (reg_map[SLJIT_SCRATCH_REG2] << 16)
1856 | (reg_map[SLJIT_SCRATCH_REG1] << 12)
1857 | (reg_map[SLJIT_SCRATCH_REG1] << 8)
1858 | reg_map[SLJIT_SCRATCH_REG2]);
1860 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2)));
1861 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1862 | (reg_map[SLJIT_SCRATCH_REG2] << 16)
1863 | (reg_map[SLJIT_SCRATCH_REG1] << 12)
1864 | (reg_map[SLJIT_SCRATCH_REG1] << 8)
1865 | reg_map[TMP_REG1]);
1869 if (compiler->scratches >= 3)
1870 EMIT_INSTRUCTION(0xe52d2008 /* str r2, [sp, #-8]! */);
1871 #if defined(__GNUC__)
1872 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1873 (op == SLJIT_UDIV ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1875 #error "Software divmod functions are needed"
1877 if (compiler->scratches >= 3)
1878 return push_inst(compiler, 0xe49d2008 /* ldr r2, [sp], #8 */);
1879 return SLJIT_SUCCESS;
1882 return SLJIT_SUCCESS;
1885 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op1(struct sljit_compiler *compiler, sljit_si op,
1886 sljit_si dst, sljit_sw dstw,
1887 sljit_si src, sljit_sw srcw)
1890 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw);
1891 ADJUST_LOCAL_OFFSET(dst, dstw);
1892 ADJUST_LOCAL_OFFSET(src, srcw);
1894 switch (GET_OPCODE(op)) {
1899 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1902 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1905 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1908 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1911 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1917 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1920 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1923 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1926 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1929 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1932 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1935 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG)
1936 compiler->skip_checks = 1;
1938 return sljit_emit_op2(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw);
1941 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw);
1944 return SLJIT_SUCCESS;
1947 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op2(struct sljit_compiler *compiler, sljit_si op,
1948 sljit_si dst, sljit_sw dstw,
1949 sljit_si src1, sljit_sw src1w,
1950 sljit_si src2, sljit_sw src2w)
1953 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1954 ADJUST_LOCAL_OFFSET(dst, dstw);
1955 ADJUST_LOCAL_OFFSET(src1, src1w);
1956 ADJUST_LOCAL_OFFSET(src2, src2w);
1958 switch (GET_OPCODE(op)) {
1965 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w);
1968 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1971 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w);
1976 if (src2 & SLJIT_IMM) {
1977 compiler->shift_imm = src2w & 0x1f;
1978 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w);
1981 compiler->shift_imm = 0x20;
1982 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1986 return SLJIT_SUCCESS;
1989 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_register_index(sljit_si reg)
1991 check_sljit_get_register_index(reg);
1992 return reg_map[reg];
1995 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_float_register_index(sljit_si reg)
1997 check_sljit_get_float_register_index(reg);
2001 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_custom(struct sljit_compiler *compiler,
2002 void *instruction, sljit_si size)
2005 check_sljit_emit_op_custom(compiler, instruction, size);
2006 SLJIT_ASSERT(size == 4);
2008 return push_inst(compiler, *(sljit_uw*)instruction);
2011 /* --------------------------------------------------------------------- */
2012 /* Floating point operators */
2013 /* --------------------------------------------------------------------- */
2015 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2019 static sljit_si arm_fpu_type = -1;
2021 static void init_compiler(void)
2023 if (arm_fpu_type != -1)
2026 /* TODO: Only the OS can help to determine the correct fpu type. */
2030 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2032 #ifdef SLJIT_IS_FPU_AVAILABLE
2033 return SLJIT_IS_FPU_AVAILABLE;
2035 if (arm_fpu_type == -1)
2037 return arm_fpu_type;
2043 #define arm_fpu_type 1
2045 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2047 /* Always available. */
2053 #define FPU_LOAD (1 << 20)
2054 #define EMIT_FPU_DATA_TRANSFER(inst, add, base, freg, offs) \
2055 ((inst) | ((add) << 23) | (reg_map[base] << 16) | (freg << 12) | (offs))
2056 #define EMIT_FPU_OPERATION(opcode, mode, dst, src1, src2) \
2057 ((opcode) | (mode) | ((dst) << 12) | (src1) | ((src2) << 16))
2059 static sljit_si emit_fop_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
2063 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_SINGLE_OP | FPU_LOAD));
2064 SLJIT_ASSERT(arg & SLJIT_MEM);
2066 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
2067 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)));
2068 arg = SLJIT_MEM | TMP_REG1;
2072 /* Fast loads and stores. */
2073 if ((arg & REG_MASK)) {
2074 if (!(argw & ~0x3fc))
2075 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2));
2076 if (!(-argw & ~0x3fc))
2077 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2));
2080 if (compiler->cache_arg == arg) {
2081 tmp = argw - compiler->cache_argw;
2082 if (!(tmp & ~0x3fc))
2083 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, tmp >> 2));
2084 if (!(-tmp & ~0x3fc))
2085 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG3, reg, -tmp >> 2));
2086 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) {
2087 FAIL_IF(compiler->error);
2088 compiler->cache_argw = argw;
2089 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2093 if (arg & REG_MASK) {
2094 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
2095 FAIL_IF(compiler->error);
2096 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, 0));
2098 imm = get_imm(argw & ~0x3fc);
2100 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, imm));
2101 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2103 imm = get_imm(-argw & ~0x3fc);
2106 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & REG_MASK, imm));
2107 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2111 compiler->cache_arg = arg;
2112 compiler->cache_argw = argw;
2113 if (arg & REG_MASK) {
2114 FAIL_IF(load_immediate(compiler, TMP_REG1, argw));
2115 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & REG_MASK, reg_map[TMP_REG1]));
2118 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
2120 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2123 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop1(struct sljit_compiler *compiler, sljit_si op,
2124 sljit_si dst, sljit_sw dstw,
2125 sljit_si src, sljit_sw srcw)
2130 check_sljit_emit_fop1(compiler, op, dst, dstw, src, srcw);
2131 SLJIT_COMPILE_ASSERT((SLJIT_SINGLE_OP == 0x100), float_transfer_bit_error);
2133 compiler->cache_arg = 0;
2134 compiler->cache_argw = 0;
2135 op ^= SLJIT_SINGLE_OP;
2137 if (GET_OPCODE(op) == SLJIT_CMPD) {
2138 if (dst & SLJIT_MEM) {
2139 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, dst, dstw));
2142 if (src & SLJIT_MEM) {
2143 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src, srcw));
2146 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VCMP_F32, op & SLJIT_SINGLE_OP, dst, src, 0));
2147 EMIT_INSTRUCTION(VMRS);
2148 return SLJIT_SUCCESS;
2151 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2153 if (src & SLJIT_MEM) {
2154 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, dst_fr, src, srcw));
2158 switch (GET_OPCODE(op)) {
2160 if (src != dst_fr && dst_fr != TMP_FREG1)
2161 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMOV_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2164 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VNEG_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2167 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VABS_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2171 if (dst_fr == TMP_FREG1) {
2172 if (GET_OPCODE(op) == SLJIT_MOVD)
2174 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), dst_fr, dst, dstw));
2177 return SLJIT_SUCCESS;
2180 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop2(struct sljit_compiler *compiler, sljit_si op,
2181 sljit_si dst, sljit_sw dstw,
2182 sljit_si src1, sljit_sw src1w,
2183 sljit_si src2, sljit_sw src2w)
2188 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
2190 compiler->cache_arg = 0;
2191 compiler->cache_argw = 0;
2192 op ^= SLJIT_SINGLE_OP;
2194 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2196 if (src2 & SLJIT_MEM) {
2197 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w));
2201 if (src1 & SLJIT_MEM) {
2202 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w));
2206 switch (GET_OPCODE(op)) {
2208 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VADD_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2212 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VSUB_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2216 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMUL_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2220 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VDIV_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2224 if (dst_fr == TMP_FREG1)
2225 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw));
2227 return SLJIT_SUCCESS;
2231 #undef EMIT_FPU_DATA_TRANSFER
2232 #undef EMIT_FPU_OPERATION
2234 /* --------------------------------------------------------------------- */
2235 /* Other instructions */
2236 /* --------------------------------------------------------------------- */
2238 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw)
2241 check_sljit_emit_fast_enter(compiler, dst, dstw);
2242 ADJUST_LOCAL_OFFSET(dst, dstw);
2244 /* For UNUSED dst. Uncommon, but possible. */
2245 if (dst == SLJIT_UNUSED)
2246 return SLJIT_SUCCESS;
2248 if (FAST_IS_REG(dst))
2249 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3)));
2252 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw))
2253 return compiler->error;
2254 /* TMP_REG3 is used for caching. */
2255 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3)));
2256 compiler->cache_arg = 0;
2257 compiler->cache_argw = 0;
2258 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0);
2261 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_si src, sljit_sw srcw)
2264 check_sljit_emit_fast_return(compiler, src, srcw);
2265 ADJUST_LOCAL_OFFSET(src, srcw);
2267 if (FAST_IS_REG(src))
2268 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src)));
2269 else if (src & SLJIT_MEM) {
2270 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw))
2271 FAIL_IF(compiler->error);
2273 compiler->cache_arg = 0;
2274 compiler->cache_argw = 0;
2275 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0));
2276 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2)));
2279 else if (src & SLJIT_IMM)
2280 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
2281 return push_inst(compiler, BLX | RM(TMP_REG3));
2284 /* --------------------------------------------------------------------- */
2285 /* Conditional instructions */
2286 /* --------------------------------------------------------------------- */
2288 static sljit_uw get_cc(sljit_si type)
2292 case SLJIT_C_MUL_NOT_OVERFLOW:
2293 case SLJIT_C_FLOAT_EQUAL:
2296 case SLJIT_C_NOT_EQUAL:
2297 case SLJIT_C_MUL_OVERFLOW:
2298 case SLJIT_C_FLOAT_NOT_EQUAL:
2302 case SLJIT_C_FLOAT_LESS:
2305 case SLJIT_C_GREATER_EQUAL:
2306 case SLJIT_C_FLOAT_GREATER_EQUAL:
2309 case SLJIT_C_GREATER:
2310 case SLJIT_C_FLOAT_GREATER:
2313 case SLJIT_C_LESS_EQUAL:
2314 case SLJIT_C_FLOAT_LESS_EQUAL:
2317 case SLJIT_C_SIG_LESS:
2320 case SLJIT_C_SIG_GREATER_EQUAL:
2323 case SLJIT_C_SIG_GREATER:
2326 case SLJIT_C_SIG_LESS_EQUAL:
2329 case SLJIT_C_OVERFLOW:
2330 case SLJIT_C_FLOAT_UNORDERED:
2333 case SLJIT_C_NOT_OVERFLOW:
2334 case SLJIT_C_FLOAT_ORDERED:
2337 default: /* SLJIT_JUMP */
2342 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
2344 struct sljit_label *label;
2347 check_sljit_emit_label(compiler);
2349 if (compiler->last_label && compiler->last_label->size == compiler->size)
2350 return compiler->last_label;
2352 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
2353 PTR_FAIL_IF(!label);
2354 set_label(label, compiler);
2358 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_si type)
2360 struct sljit_jump *jump;
2363 check_sljit_emit_jump(compiler, type);
2365 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2367 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
2370 /* In ARM, we don't need to touch the arguments. */
2371 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2372 if (type >= SLJIT_FAST_CALL)
2373 PTR_FAIL_IF(prepare_blx(compiler));
2374 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0,
2375 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0));
2377 if (jump->flags & SLJIT_REWRITABLE_JUMP) {
2378 jump->addr = compiler->size;
2379 compiler->patches++;
2382 if (type >= SLJIT_FAST_CALL) {
2383 jump->flags |= IS_BL;
2384 PTR_FAIL_IF(emit_blx(compiler));
2387 if (!(jump->flags & SLJIT_REWRITABLE_JUMP))
2388 jump->addr = compiler->size;
2390 if (type >= SLJIT_FAST_CALL)
2391 jump->flags |= IS_BL;
2392 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2393 PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type)));
2394 jump->addr = compiler->size;
2399 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_ijump(struct sljit_compiler *compiler, sljit_si type, sljit_si src, sljit_sw srcw)
2401 struct sljit_jump *jump;
2404 check_sljit_emit_ijump(compiler, type, src, srcw);
2405 ADJUST_LOCAL_OFFSET(src, srcw);
2407 /* In ARM, we don't need to touch the arguments. */
2408 if (!(src & SLJIT_IMM)) {
2409 if (FAST_IS_REG(src))
2410 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src));
2412 SLJIT_ASSERT(src & SLJIT_MEM);
2413 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw));
2414 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2));
2417 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2419 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
2420 jump->u.target = srcw;
2422 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2423 if (type >= SLJIT_FAST_CALL)
2424 FAIL_IF(prepare_blx(compiler));
2425 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0));
2426 if (type >= SLJIT_FAST_CALL)
2427 FAIL_IF(emit_blx(compiler));
2429 FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2430 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)));
2432 jump->addr = compiler->size;
2433 return SLJIT_SUCCESS;
2436 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_si op,
2437 sljit_si dst, sljit_sw dstw,
2438 sljit_si src, sljit_sw srcw,
2441 sljit_si dst_r, flags = GET_ALL_FLAGS(op);
2445 check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type);
2446 ADJUST_LOCAL_OFFSET(dst, dstw);
2447 ADJUST_LOCAL_OFFSET(src, srcw);
2449 if (dst == SLJIT_UNUSED)
2450 return SLJIT_SUCCESS;
2452 op = GET_OPCODE(op);
2454 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
2456 if (op < SLJIT_ADD) {
2457 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 0));
2458 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc);
2459 return (dst_r == TMP_REG2) ? emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw) : SLJIT_SUCCESS;
2462 ins = (op == SLJIT_AND ? AND_DP : (op == SLJIT_OR ? ORR_DP : EOR_DP));
2463 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
2464 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc);
2465 /* The condition must always be set, even if the ORR/EOR is not executed above. */
2466 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst))) : SLJIT_SUCCESS;
2469 compiler->cache_arg = 0;
2470 compiler->cache_argw = 0;
2471 if (src & SLJIT_MEM) {
2472 FAIL_IF(emit_op_mem2(compiler, WORD_DATA | LOAD_DATA, TMP_REG1, src, srcw, dst, dstw));
2475 } else if (src & SLJIT_IMM) {
2476 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
2481 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 1) & ~COND_MASK) | cc);
2482 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 0) & ~COND_MASK) | (cc ^ 0x10000000));
2483 if (dst_r == TMP_REG2)
2484 FAIL_IF(emit_op_mem2(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0));
2486 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst_r))) : SLJIT_SUCCESS;
2489 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw, sljit_sw init_value)
2491 struct sljit_const *const_;
2495 check_sljit_emit_const(compiler, dst, dstw, init_value);
2496 ADJUST_LOCAL_OFFSET(dst, dstw);
2498 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2499 PTR_FAIL_IF(!const_);
2501 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2;
2503 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2504 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value));
2505 compiler->patches++;
2507 PTR_FAIL_IF(emit_imm(compiler, reg, init_value));
2509 set_const(const_, compiler);
2511 if (dst & SLJIT_MEM)
2512 PTR_FAIL_IF(emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw));
2516 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2518 inline_set_jump_addr(addr, new_addr, 1);
2521 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant)
2523 inline_set_const(addr, new_constant, 1);