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[trains.git]
/
pcb
/
detectors.pcb
2004-09-12
ian
RPCL attaches before RPCI not after
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2004-09-09
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mounting holes 177thou = 4.5mm
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2004-09-07
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get rid of crappy unused 1 corner things
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2004-09-07
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unused 1 (group7) used for merge outline
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2004-09-04
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drc minoverlap 6
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2004-09-04
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solder resist tol is 5th from pad every pad
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2004-09-04
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change hole sizes for d25 and pfets
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2004-09-02
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reroute following pin changes
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2004-09-02
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square up header pins
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2004-09-02
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holes
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2004-09-02
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before fix up fet pins
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2004-09-02
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bus connector and annotations
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2004-09-02
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detectors routes
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2004-09-02
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before reshrink
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2004-09-02
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new BUS connector
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2004-09-02
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mounting hole diagrams
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2004-09-01
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connector INDIV0 diagram
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2004-09-01
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delete offboard silk from indiv0
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2004-09-01
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before adjust silk
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2004-08-30
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smaller; passes nicely; is next draft
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2004-08-30
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fixes, routes nicely, before shrink manually again
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2004-08-29
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detectors draft finished
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2004-08-29
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before resize
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2004-08-29
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before shift
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2004-08-29
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working on routing
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2004-08-29
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really routes but still no room for text
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2004-08-29
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routes but text does not fit
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2004-08-29
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before much manual routing
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2004-08-29
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mounting holes placed
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2004-08-29
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working on routing
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2004-08-29
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ground and power routing
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2004-08-28
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pic senses done? wip
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2004-08-28
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sense lines route wip
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2004-08-28
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rats nicely laid out etc except for pic pins
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2004-08-28
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before reorg sense
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2004-08-28
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redo layout placement wip
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2004-08-28
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before delete stuff for redo
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2004-08-28
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before move some rs*
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2004-08-28
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rasN
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2004-08-28
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make more like detectors. wip. problem with netlist
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2004-08-28
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before c&p oc
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2004-08-28
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before c&p oc
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2004-08-28
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before turn brs
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2004-08-28
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rectifiers
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2004-08-26
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rename
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2004-08-26
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clone and hack
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