From: ian Date: Tue, 7 Sep 2004 23:22:20 +0000 (+0000) Subject: usagae comment X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=f946f50ecbe462e36250806d284ee7fdc5fde6bc;p=trains.git usagae comment --- diff --git a/pcb/pcb-panelise b/pcb/pcb-panelise index 1289063..69f251d 100755 --- a/pcb/pcb-panelise +++ b/pcb/pcb-panelise @@ -1,4 +1,32 @@ #!/usr/bin/perl -w +# +# Panelises PCB layouts +# +# Usage: +# pcb-panelise [options] layout1.pcb layout2.pcb ... +# +# Options: +# -gTHOU set inter-board gap to THOU +# (should occur _before_ the board which _precedes_ the +# gap, and then affects all later gaps) +# +# Layouts are currently simply placed parallel from top to bottom. +# Making it put them somewhere else wouldn't be _too_ hard; basically, +# make an option for the user to specify xpos and ypos between layouts. +# +# Rotation will be slightly more difficult and will involve a careful +# review of Stuff, to see where additional transformations etc. are needed. +# It might be eaiser to use pcb to rotate the boards. +# +# We use a trick to make net and element names unique: we append +# spaces to the names in the 2nd and subsequent boards. This seems to +# work fine in pcb snapshot 1.99.20040530-0.0.1 but means that +# - you mustn't feed this program's output to itself! +# - you probably don't want to edit the output (but you didn't +# edit output files anyway, did you?) +# +# On the other hand, pcb's builtin netlist correspondence checker and +# DRC system ought to work properly. use strict qw(vars);