From: ian Date: Sat, 15 Jan 2005 16:23:37 +0000 (+0000) Subject: checking in thing found in anarres:~ceb/work/trains -iwj X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=8d1777e23d269ba104ed2c03480dcf165f9fe0d8;p=trains.git checking in thing found in anarres:~ceb/work/trains -iwj --- diff --git a/cebpic/nmra-stream.asm b/cebpic/nmra-stream.asm index 31697e8..81ba119 100644 --- a/cebpic/nmra-stream.asm +++ b/cebpic/nmra-stream.asm @@ -92,7 +92,7 @@ initialise ; initial config - RCSTA register p182 bsf RCSTA,7,0 ; serial port enable (p182) - bsf RCSTA,6,0 ; 8-bit reception + bcf RCSTA,6,0 ; 8-bit reception bsf RCSTA,4,0 ; enable continuous receive ; set SPBRG to get correct baud rate according to table top right p186 @@ -211,11 +211,11 @@ interrupt_low ; check which interrupt. Branch to serial_receive or timer or return debug '*' ; write 'f' to serial port - btfsc PIR1,5,0 ; check whether serial recv interrupt bit set - goto serial_receive - debug 'g' ; write 'g' to serial port btfsc INTCON,2,0 ; check whether timer0 interrupt set goto timer0_interrupt + debug 'g' ; write 'g' to serial port + btfsc PIR1,5,0 ; check whether serial recv interrupt bit set + goto serial_receive debug 'L' goto panic @@ -244,6 +244,8 @@ serial_receive btfss INDF0,7,0 ; check if bit 7 is set incf FROMSERIAL,1,0 ; advance FROMSERIAL pointer by 1 byte ; debug '4' ; write 'h' to serial port + + bcf PIR1,RCIF,0 ; unset interrupt retfie 1 ; *** I *think* the interrupt bit is cleared by reading out of RCREG @@ -281,10 +283,10 @@ timer0_interrupt endif ifndef SLOW_VERSION - movlw 0x6E ; (not-testing) + movlw 0x73 ; (not-testing) endif - movwf TMR0L,0 ; set timer0 to 0x6E (so interrupt takes 58us) + movwf TMR0L,0 ; set timer0 to appropriate value (so interrupt takes 58us) debug 'k' ; write 'k' to serial port diff --git a/detpic/nmra-stream.asm b/detpic/nmra-stream.asm index 31697e8..81ba119 100644 --- a/detpic/nmra-stream.asm +++ b/detpic/nmra-stream.asm @@ -92,7 +92,7 @@ initialise ; initial config - RCSTA register p182 bsf RCSTA,7,0 ; serial port enable (p182) - bsf RCSTA,6,0 ; 8-bit reception + bcf RCSTA,6,0 ; 8-bit reception bsf RCSTA,4,0 ; enable continuous receive ; set SPBRG to get correct baud rate according to table top right p186 @@ -211,11 +211,11 @@ interrupt_low ; check which interrupt. Branch to serial_receive or timer or return debug '*' ; write 'f' to serial port - btfsc PIR1,5,0 ; check whether serial recv interrupt bit set - goto serial_receive - debug 'g' ; write 'g' to serial port btfsc INTCON,2,0 ; check whether timer0 interrupt set goto timer0_interrupt + debug 'g' ; write 'g' to serial port + btfsc PIR1,5,0 ; check whether serial recv interrupt bit set + goto serial_receive debug 'L' goto panic @@ -244,6 +244,8 @@ serial_receive btfss INDF0,7,0 ; check if bit 7 is set incf FROMSERIAL,1,0 ; advance FROMSERIAL pointer by 1 byte ; debug '4' ; write 'h' to serial port + + bcf PIR1,RCIF,0 ; unset interrupt retfie 1 ; *** I *think* the interrupt bit is cleared by reading out of RCREG @@ -281,10 +283,10 @@ timer0_interrupt endif ifndef SLOW_VERSION - movlw 0x6E ; (not-testing) + movlw 0x73 ; (not-testing) endif - movwf TMR0L,0 ; set timer0 to 0x6E (so interrupt takes 58us) + movwf TMR0L,0 ; set timer0 to appropriate value (so interrupt takes 58us) debug 'k' ; write 'k' to serial port