From: ian <ian>
Date: Wed, 5 Jan 2005 18:18:45 +0000 (+0000)
Subject: not really a bug - a miconversion
X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=87710617a419a3a35d8209b55d2878c92cd23fd2;p=trains.git

not really a bug - a miconversion
---

diff --git a/hostside/README b/hostside/README
index c18d98d..71dd7ca 100644
--- a/hostside/README
+++ b/hostside/README
@@ -9,13 +9,12 @@ Eg,
 to tell decoder 3 to go speed 13 forwards
 
  7f       7f       00       64       41       97         output bytes
- 01111111 01111111 00000000 01101000 01000001 10010111   as bits
- >1111111 >1111111 >0000000 >1101000 >1000001 $0010111   top bit: >/$ for pic
+ 01111111 01111111 00000000 01100100 01000001 10010111   as bits
+ >1111111 >1111111 >0000000 >1100100 >1000001 $0010111   top bit: >/$ for pic
  
- 1111111 1111111  0 00000011 0 10001000 0 01001011 1     reorg bits for nmra:
-  preamble (14)   S 0AAAAAAA P 
-
-        MISTAKE it should be P 01DCSSSS
+ 1111111 1111111  0 00000011 0 01001000 0 01001011 1     reorg bits for nmra:
+  preamble (14)   S 0AAAAAAA P 01DCSSSS 0 EEEEEEEE 1
+                    03    (+)  48       = 4b ok
 
 To test:
  >t; ./hostside t 0348 n && binview t