From: ian <ian>
Date: Sat, 21 Aug 2004 17:54:19 +0000 (+0000)
Subject: reversers new connector wip
X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ijackson/git?a=commitdiff_plain;h=42b9151cfd2806576b477ac73e0fab1d48a8dfa7;p=trains.git

reversers new connector wip
---

diff --git a/pcb/reversers.pcb b/pcb/reversers.pcb
index f76b51d..5662402 100644
--- a/pcb/reversers.pcb
+++ b/pcb/reversers.pcb
@@ -1,12 +1,12 @@
 # release: pcb-bin 1.99p
-# date:    Sat Aug 21 16:36:52 2004
+# date:    Sat Aug 21 18:52:12 2004
 # user:    ian (Ian Jackson)
 # host:    anarres.relativity.greenend.org.uk
 
 PCB["reversers.pcb" 1410000 355000]
 
-Grid[5000.00000000 0 0 1]
-Cursor[296114 222085 3.970090]
+Grid[3937.00781250 0 0 1]
+Cursor[209384 159846 2.970090]
 Thermal[0.500000]
 DRC[809 400 800 800]
 Flags(0x0000000000001e51)
@@ -773,6 +773,20 @@ Symbol['~' 1200]
 	SymbolLine[1500 2500 2000 2500 800]
 	SymbolLine[2000 2500 2500 2000 800]
 )
+Via[295275 51181 9900 4000 0 5000 "" 0x00000002]
+Via[275590 51181 9900 4000 0 5000 "" 0x00000002]
+Via[255905 51181 9900 4000 0 5000 "" 0x00000002]
+Via[236220 51181 9900 4000 0 5000 "" 0x00000002]
+Via[216535 51181 9900 4000 0 5000 "" 0x00000002]
+Via[196850 51181 9900 4000 0 5000 "" 0x00000002]
+Via[177165 51181 9900 4000 0 5000 "" 0x00000002]
+Via[39370 51181 9900 4000 0 5000 "" 0x00000002]
+Via[59055 51181 9900 4000 0 5000 "" 0x00000002]
+Via[78740 51181 9900 4000 0 5000 "" 0x00000002]
+Via[98425 51181 9900 4000 0 5000 "" 0x00000002]
+Via[118110 51181 9900 4000 0 5000 "" 0x00000002]
+Via[137795 51181 9900 4000 0 5000 "" 0x00000002]
+Via[157480 51181 9900 4000 0 5000 "" 0x00000002]
 
 Element[0x00000000 "" "RLY13" "" 820000 320000 12500 -20000 0 100 0x00000000]
 (
@@ -2212,6 +2226,39 @@ Layer(9 "silk")
 )
 Layer(10 "silk")
 (
+	Line[27559 70866 27559 31496 1000 2000 0x00000020]
+	Line[27559 31496 307087 31496 1000 2000 0x00000020]
+	Line[307087 31496 307087 70866 1000 2000 0x00000020]
+	Line[39370 31496 39370 39370 1000 2000 0x00000020]
+	Line[27559 66929 307087 66929 1000 2000 0x00000020]
+	Line[295276 66929 295276 59055 1000 2000 0x00000020]
+	Line[275591 59055 275591 66929 1000 2000 0x00000020]
+	Line[255906 66929 255906 59055 1000 2000 0x00000020]
+	Line[236220 59055 236220 66929 1000 2000 0x00000020]
+	Line[216536 66929 216536 59055 1000 2000 0x00000020]
+	Line[196851 59055 196851 66929 1000 2000 0x00000020]
+	Line[177166 66929 177166 59055 1000 2000 0x00000020]
+	Line[157480 59055 157480 66929 1000 2000 0x00000020]
+	Line[137796 66929 137796 59055 1000 2000 0x00000020]
+	Line[118111 59055 118111 66929 1000 2000 0x00000020]
+	Line[98426 66929 98426 59055 1000 2000 0x00000020]
+	Line[78740 59055 78740 66929 1000 2000 0x00000020]
+	Line[59055 66929 59055 59055 1000 2000 0x00000020]
+	Line[39370 59055 39370 66929 1000 2000 0x00000020]
+	Line[295276 39370 295276 31496 1000 2000 0x00000020]
+	Line[275591 31496 275591 39370 1000 2000 0x00000020]
+	Line[255906 39370 255906 31496 1000 2000 0x00000020]
+	Line[236220 31496 236220 39370 1000 2000 0x00000020]
+	Line[216536 39370 216536 31496 1000 2000 0x00000020]
+	Line[196851 31496 196851 39370 1000 2000 0x00000020]
+	Line[177166 39370 177166 31496 1000 2000 0x00000020]
+	Line[157480 31496 157480 39370 1000 2000 0x00000020]
+	Line[137796 39370 137796 31496 1000 2000 0x00000020]
+	Line[118111 31496 118111 39370 1000 2000 0x00000020]
+	Line[98426 39370 98426 31496 1000 2000 0x00000020]
+	Line[78740 31496 78740 39370 1000 2000 0x00000020]
+	Line[59055 39370 59055 31496 1000 2000 0x00000020]
+	Line[307087 70866 27559 70866 1000 2000 0x00000020]
 	Arc[565001 310001 1 1 1000 2000 0 -90 0x00000020]
 	Arc[565001 310001 1 1 1000 2000 -90 90 0x00000020]
 	Arc[585001 220001 1 1 1000 2000 0 -90 0x00000020]