panicst res 1
panicst_restart_i2c equ 7
panicst_acked equ 5
+panicst_ferroerr equ 4
+panicst_writeslave equ 3
+
+panic_valcount res 1
panic_vars_section udata 0x060 + maxpics ; not available via access bank
; used in panic routine for temporary storage:
mov_wf TMR0L ; set timer0 low byte - timer now set
waiting_loop ; wait for timer0 interrupt, or some other interrupt
bt_f_if1 INTCON,TMR0IF
- bra waiting_done
+ return
+
+ bt_f_if1 idloc1, idloc1_master
+ bra waiting_master
+ ; slave:
bt_f_if0 SSPCON1, SSPEN
bra waiting_loop ; no readouts if i2c is disabled
-
- bt_f_if1 idloc1, idloc1_master
- bra waiting_loop ; no readouts on master yet
+ ; slave, i2c enabled:
bt_f_if1 PIR1, SSPIF
- call i2cs_interrupt
+ call pan_i2cs_interrupt
bra waiting_loop
+;----------------------------------------
+; MASTER'S PANIC SERIAL PORT HANDLING
+
+;--------------------
+waiting_master
+ bt_f_if1 PIR1,RCIF ; host sent us something ?
+ call panicd_serialrx
+
+ bt_f_if0 SSPCON1, SSPEN
+ bra waiting_loop
+ ; master, i2c enabled:
+
+ bt_f_if1 PIR1, SSPIF
+ rcall pan_i2cm_interrupt
+
+ bra waiting_loop
+
;----------
-waiting_done
-;x bt_f_if0 panicst, panicst_restart_i2c
- return
- bc_f panicst, panicst_restart_i2c
- mov_lw picno
- and_lw 0x7f
- bra_z waiting_done_if_master
- call i2cs_init
-lgl
- call led_green
- bra lgl
- goto i2cs_init
-
-waiting_done_if_master
- return
+panicst_oerrferr
+ dec_fw RCREG
+ bra_nz panicd_serialrx_err_loop
+ ; yay! host ack'd ferr/oerr
+ bc_f panicst, panicst_ferroerr
+ return ; return from panicd_serialrx
+;----------
+panicd_serialrx_err
+ bs_f panicst, panicst_ferroerr
+ call led_green
+ bc_f RCSTA, RCEN ; disable } to clear FERR/OERR
+ mov_fw RCREG ; read RCREG } (see PIC18FXX8 DS p182)
+ bs_f RCSTA, RCEN ; reenable }
+panicd_serialrx_err_loop
+ bt_f_if0 PIR1, RCIF ; wait for a byte 0x01 to ack the overrun/error
+ bra panicd_serialrx_err_loop
+;...
+;----------
+panicd_serialrx
+ bt_f_if1 RCSTA,FERR
+ bra panicd_serialrx_err
+ bt_f_if1 RCSTA,OERR
+ bra panicd_serialrx_err
+ bt_f_if1 panicst, panicst_ferroerr
+ mov_wf RCREG
+;...
;****************************************************************************
; MEMORY READOUT
+pan_ code
;----------
pan_i2csu_write_data
panicd_process_input_byte
; OK, we have an instruction:
bt_w_if1 7 ; huh?
- return
+ bra write_if_setbytetowrite
bt_w_if1 6
bra panic_crashread_setpointer
bt_f_if0 idloc1,idloc1_master
return ; all the remaining options are for master only
-;nyi bt_w_if1 5
-;nyi bra write_if_selectslave
-;nyi bt_w_if1 4
-;nyi bra write_if_readout
+ bt_w_if1 5
+ bra write_if_master_slaveselect
+ bt_w_if1 4
+ bra write_if_master_masterread
+ bra write_if_master_slaveread
return ; huh ?
;----------
bs_f panicst, panicst_acked ; since we were asked to
panic morse_E
+;======================================================================
+; MASTER READOUT AND MASTER READOUT OF SLAVES
+
+;----------
+write_if_setbytetowrite
+ bt_f_if0 idloc1,idloc1_master
+ return ; for master only
+
+ bc_w 7
+ mov_wf panic_valcount
+ bs_f panicst, panicst_writeslave
+ return
+
+;----------
+write_if_master_slaveread
+ mov_wf panic_valcount
+ bc_f panicst, panicst_writeslave
+ return
+
+;----------
+write_if_master_slaveselect
+ bc_w 5
+ bt_f_if1 panicst, panicst_writeslave
+ bra pan_i2cm_write_start
+ bra pan_i2cm_read_start
+
+;----------
+write_if_master_masterread
+ bc_w 4
+ mov_wf panic_valcount
+write_if_master_masterread_loop
+ mov_fw POSTINC1
+ call serial_write_char
+ dec_fw_ifnz panic_valcount
+ bra write_if_master_masterread_loop
+ return
+
;----------
pan_i2cmu_read_got_byte
+ call serial_write_char
+ dec_fw_ifnz panic_valcount
+ bra pan_i2cm_read_another
+ return
+
+;----------
pan_i2cmu_write_next_byte
+ mov_fw panic_valcount
+ bs_f STATUS, Z
+ bt_f_if1 panicst, panicst_writeslave
+ bc_f STATUS, Z
+ bc_f panicst, panicst_writeslave
+ return
+
+;----------
pan_i2cmu_done
- i2cpanic morse_USP
+ mov_lw ' '
+ goto serial_write_char
+
+;======================================================================
+; SLAVE I2C
pan_near_i2csu code
;----------