swap in and out for DEFG

diff --git a/iwjpictest/copybits.asm b/iwjpictest/copybits.asm
index 45c695dd7097428a92ea55654d2aacf33c254d68..1cfa1d3d48d708aab0043b44930c73f33f5de430 100644 (file)
--- a/iwjpictest/copybits.asm
+++ b/iwjpictest/copybits.asm
@@ -32,9 +32,9 @@ start
        bcf             TRISA, 0, 0     ; enable flasher output
        movlw           0x07            ; turn off A-to-D so we get
        movwf           ADCON1, 0       ;  digital inputs on RA0-3 (AN0-3)
-       bcf             TRISA, 6, 0     ; enable output D
-       movlw           0xf8            ; enable outputs E,F,G
-       movwf           TRISC, 0        ;  (RC0-2)
+       bcf             TRISD, 4, 0     ; enable output D
+       movlw           0x1f            ; enable outputs E,F,G
+       movwf           TRISC, 0        ;  (RC7,6,5)
 
 loop
        btg             LATA, 0, 0
@@ -72,10 +72,10 @@ copybit macro sreg, sbitno, dreg, dbitvals
        copybit         PORTB, 0, PORTA, 0x20           ; A data
        copybit         PORTB, 0, PORTE, 0x01           ; A data
 
-       copybit         PORTD, 4, PORTA, 0x40           ; D
-       copybit         PORTC, 7, PORTC, 0x01           ; E
-       copybiti        PORTC, 6, PORTC, 0x02           ; F
-       copybiti        PORTC, 5, PORTC, 0x04           ; G
+       copybiti        PORTA, 6, PORTD, 0x10           ; D
+       copybiti        PORTC, 0, PORTC, 0x80           ; E
+       copybiti        PORTC, 1, PORTC, 0x40           ; F
+       copybiti        PORTC, 2, PORTC, 0x20           ; G
                                                ; 12 x copybit @6 = 48cy
 
        decfsz          COUNTINNER, 1, 0        ; 1 cycle

diff --git a/iwjpictest/flasher.asm b/iwjpictest/flasher.asm
index 45c695dd7097428a92ea55654d2aacf33c254d68..1cfa1d3d48d708aab0043b44930c73f33f5de430 100644 (file)
--- a/iwjpictest/flasher.asm
+++ b/iwjpictest/flasher.asm
@@ -32,9 +32,9 @@ start
        bcf             TRISA, 0, 0     ; enable flasher output
        movlw           0x07            ; turn off A-to-D so we get
        movwf           ADCON1, 0       ;  digital inputs on RA0-3 (AN0-3)
-       bcf             TRISA, 6, 0     ; enable output D
-       movlw           0xf8            ; enable outputs E,F,G
-       movwf           TRISC, 0        ;  (RC0-2)
+       bcf             TRISD, 4, 0     ; enable output D
+       movlw           0x1f            ; enable outputs E,F,G
+       movwf           TRISC, 0        ;  (RC7,6,5)
 
 loop
        btg             LATA, 0, 0
@@ -72,10 +72,10 @@ copybit macro sreg, sbitno, dreg, dbitvals
        copybit         PORTB, 0, PORTA, 0x20           ; A data
        copybit         PORTB, 0, PORTE, 0x01           ; A data
 
-       copybit         PORTD, 4, PORTA, 0x40           ; D
-       copybit         PORTC, 7, PORTC, 0x01           ; E
-       copybiti        PORTC, 6, PORTC, 0x02           ; F
-       copybiti        PORTC, 5, PORTC, 0x04           ; G
+       copybiti        PORTA, 6, PORTD, 0x10           ; D
+       copybiti        PORTC, 0, PORTC, 0x80           ; E
+       copybiti        PORTC, 1, PORTC, 0x40           ; F
+       copybiti        PORTC, 2, PORTC, 0x20           ; G
                                                ; 12 x copybit @6 = 48cy
 
        decfsz          COUNTINNER, 1, 0        ; 1 cycle

diff --git a/iwjpictest/serialloop.asm b/iwjpictest/serialloop.asm
index 45c695dd7097428a92ea55654d2aacf33c254d68..1cfa1d3d48d708aab0043b44930c73f33f5de430 100644 (file)
--- a/iwjpictest/serialloop.asm
+++ b/iwjpictest/serialloop.asm
@@ -32,9 +32,9 @@ start
        bcf             TRISA, 0, 0     ; enable flasher output
        movlw           0x07            ; turn off A-to-D so we get
        movwf           ADCON1, 0       ;  digital inputs on RA0-3 (AN0-3)
-       bcf             TRISA, 6, 0     ; enable output D
-       movlw           0xf8            ; enable outputs E,F,G
-       movwf           TRISC, 0        ;  (RC0-2)
+       bcf             TRISD, 4, 0     ; enable output D
+       movlw           0x1f            ; enable outputs E,F,G
+       movwf           TRISC, 0        ;  (RC7,6,5)
 
 loop
        btg             LATA, 0, 0
@@ -72,10 +72,10 @@ copybit macro sreg, sbitno, dreg, dbitvals
        copybit         PORTB, 0, PORTA, 0x20           ; A data
        copybit         PORTB, 0, PORTE, 0x01           ; A data
 
-       copybit         PORTD, 4, PORTA, 0x40           ; D
-       copybit         PORTC, 7, PORTC, 0x01           ; E
-       copybiti        PORTC, 6, PORTC, 0x02           ; F
-       copybiti        PORTC, 5, PORTC, 0x04           ; G
+       copybiti        PORTA, 6, PORTD, 0x10           ; D
+       copybiti        PORTC, 0, PORTC, 0x80           ; E
+       copybiti        PORTC, 1, PORTC, 0x40           ; F
+       copybiti        PORTC, 2, PORTC, 0x20           ; G
                                                ; 12 x copybit @6 = 48cy
 
        decfsz          COUNTINNER, 1, 0        ; 1 cycle