slave res 1 ; master only
st res 1
+st_orig res 1
; st is a bitmask, bit set in visible states:
; master slave
mov_wf SSPCON1
clr_f SSPCON2 ; nothing going
mov_lw 0x80 ; SMP(noslew), !CKE(!smbus)
+ mov_wf SSPSTAT
bra init_enable
;----------
mov_ff SSPCON1, sspcon1
mov_ff SSPCON2, sspcon2
- bt_f_if1 sspcon1, WCOL
- bra_z m_event_bad
- bt_f_if1 sspcon1, SSPOV
- bra_z m_event_bad
+ bc_f PIR1, SSPIF
+
+ mov_lw (1<<WCOL) | (1<<SSPOV)
+ and_wfw sspcon1
+ bra_nz m_event_bad
; No ? Well, then the I2C should be idle now:
mov_fw sspcon2
- and_lw ~0x60 ; ACKSTAT,ACKDT
+ and_lw ~((1<<ACKSTAT) | (1<<ACKDT)) ; those two are ok if set
bra_nz m_event_bad
; OK...
bc_f st, st_awaiting
bs_f st, st_acking
bc_f SSPCON2, ACKDT ; ACKDT=0 means to acknowledge
+ bt_f_if0 st, st_reading
+ bs_f SSPCON2, ACKDT ; don't ack last byte
bs_f SSPCON2, ACKEN
return
mov_wf SSPCON1
mov_lw 0x01 ; !GCEN, SEN
mov_wf SSPCON2
- mov_lw 0x8 ; SMP(noslew), !CKE(!smbus)
+ mov_lw 0x80 ; SMP(noslew), !CKE(!smbus)
mov_wf SSPSTAT
init_enable
; Actually engages the I2C controller, which must already have
set_f sspstat
set_f sspcon1
set_f sspcon2
+ set_f st_orig
bs_f TRISB, 0
bs_f TRISB, 1
bc_f IPR1, SSPIP
return
; We have an interrupt:
- bt_f_if1 sspcon1, WCOL
- bra_z s_event_bad
- bt_f_if1 sspcon1, SSPOV
- bra_z s_event_bad
-
; Firstly, clear the interrupt flag so that if something else happens
; while we faff, the interrupt will be regenerated:
bc_f PIR1, SSPIF
mov_ff SSPSTAT, sspstat
mov_ff SSPCON1, sspcon1
+ mov_ff st, st_orig
- bt_f_if0 st, st_reading
+ mov_lw (1<<WCOL) | (1<<SSPOV)
+ and_wfw sspcon1
+ bra_nz s_event_bad
+
+ bt_f_if1 st, st_reading
bra s_event_reading
- bt_f_if0 st, st_writing
+ bt_f_if1 st, st_writing
bra s_event_writing
s_event_idle
chkvals_start_sspstat
chkval 0, 0xac, s_event_reading_datasent ; D,!P, S,R,!BF
+; mov_fw st
+; bra_z nopanic
+; panic morse_Z
+;nopanic
+
; Whatever is happening, we're done reading now !
clr_f st
call i2csu_read_done
TI5 ; for iwj
X test-sofar:ch ; bad character received from host
-Z ::nonexistent_variable ; test message
+ZM i2clib:st,:sspstat,:sspcon1,:sspcon2 ; for testing
+ZS i2clib:st,:sspstat,:sspcon1,:st_orig ; for testing
# Messages for i2clib, S*
SM i2clib:st,:sspstat,:sspcon1,:sspcon2 ; m.,i., ctrlr bad state
-SS i2clib:st,:sspstat,:sspcon1 ; slave, intr, controller bad state
+SS i2clib:st,:sspstat,:sspcon1,:st_orig ; s.,i., controller bad state
SK i2clib:slave ; m. couldn't address slave (no ack)
SN i2clib:slave ; improper slave number
SW i2clib:st ; improper i2cm_write_start