}
proc setup_m {} { xmit 0; xmit 0; xmit 0; pause 250; junkrecv }
-proc setup_s {} { setup_m; xmit_s 0; xmit_s 0 }
+proc setup_s {} { setup_m; xmit 128; pause 256; junkrecv; xmit_s 0; xmit_s 0 }
proc setup_t {} { }
proc selectaddr_ms {xmit a} {
panicst_acked equ 5
panicst_ferroerr equ 4
panicst_writeslave equ 3
-panicst_onlyourwrite equ 2
+panicst_i2cmours equ 2
+panicst_i2cmenable equ 2
panic_valcount res 1
bra waiting_loop
; master, i2c enabled:
+ bt_f_if0 panicst, panicst_i2cmenable
+ bra waiting_loop
+
bt_f_if1 PIR1, SSPIF
rcall pan_i2cm_interrupt
bc_w 7
mov_wf panic_valcount
bs_f panicst, panicst_writeslave
- bs_f panicst, panicst_onlyourwrite
+ bs_f panicst, panicst_i2cmenable
return
;----------
write_if_master_slaveselect
bc_w 5
btg_w 4
+ bs_f panicst, panicst_i2cmours
bt_f_if1 panicst, panicst_writeslave
bra pan_i2cm_write_start
bra pan_i2cm_read_start
;----------
pan_i2cmu_read_got_byte
+ bt_f_if0 panicst, panicst_i2cmours
+ return
call serial_write_char
dec_f_ifnz panic_valcount
bra pan_i2cm_read_another
pan_i2cmu_write_next_byte
mov_fw panic_valcount
bc_f STATUS, Z
- bt_f_if0 panicst, panicst_onlyourwrite
+ bt_f_if0 panicst, panicst_i2cmours
retlw 0x00
bt_f_if0 panicst, panicst_writeslave
bs_f STATUS, Z