join X2 and X1 together into X2 with the new relay (waggler)

diff --git a/layout/ours.m4 b/layout/ours.m4
index 93f9f00b1fb56fbb8caeafa12b6c0a9c5acccd0a..2a81362814ee1dc3af10e74424250ed1a43a8f5c 100644 (file)
--- a/layout/ours.m4
+++ b/layout/ours.m4
@@ -37,16 +37,16 @@ layer 0
 abs midx_x_m 930 700 90
 
 segment midx_
-segmap  midx_F -X1  midx_B X2
+segmap  midx_F/ -X2/R1  midx_B/ X2/R0
 part midx_x cross_peco_s m
 
-segment -X1 165 -X3
+segment -X2/R1 165 -X3
 extend midx_x_tr -top_0rm_b parallel demos!right_main_up 315
 
 segment X7
 part top_0rm ^pt_main_r b
 
-segment X2 155 X4
+segment X2/R0 155 X4
 extend midx_x_tl -top_0lm_b parallel demos!-right_main_down -315
 
 segment -X8

diff --git a/layout/ours.wiring b/layout/ours.wiring
index 604cdd2ca1cba50e02a37c1eeae562b68260faa6..e3165e444bc14e9e58a206204faa9045b0b5be3b 100644 (file)
--- a/layout/ours.wiring
+++ b/layout/ours.wiring
@@ -5,7 +5,6 @@ boards
 
 invertible
 #      segment board.invert&sense
-       X1      0.3
        X2      1.0
        X3      0.1
        X4      1.1
@@ -32,6 +31,15 @@ points
        A6/P    2.3     .2
        A5/P    0.3     .2
 
+relays
+#      relay   board.netname   # INDIV0-pin to board  conn   purpose
+#      tbd     2.rs232_rxin    # INDIV0-10  extra(#1) 10wy#1 uln port1
+       X2/R    2.pwmout        # INDIV0-9   extra(#1) 10wy#2 uln port2
+#      tbd     2.rs232_txout   # INDIV0-22  extra(#1) 10wy#3 (uln port3?)
+#
+# board.netname is eg board.spare0 or board.indiv0_3
+#   see pin-info-gen, *.pin-info, *.net
+
 fixed
 #      point
        A6/J0
@@ -39,7 +47,6 @@ fixed
        A2/P0
 
 interferences
-       - X1 X2
        A5/P0J1 A6/P0J1
 
 endwiring