changes to flash byte order in README.protocol

test program for TBLRD from flash memory

diff --git a/cebpic/README.protocol b/cebpic/README.protocol
index 52b880ef5baaa0ff5edbb1474a7549999a9fc556..8a7c39936da626c7f124d056701eff0ac7111a26 100644 (file)
--- a/cebpic/README.protocol
+++ b/cebpic/README.protocol
@@ -22,12 +22,13 @@ Flash memory ID locations
 =========================
 
 Byte 20 0000h
+               PIC number (guaranteed to be in range 0..63 inclusive)
+
+Byte 20 0001h
                bit 0           1 for the main PIC (#0)
                                0 otherwise
                1-7             currently unused, set to 0
 
-Byte 20 0001h
-               PIC number (guaranteed to be in range 0..63 inclusive)
 
 I2C
 ===

diff --git a/cebpic/i2c-test.asm b/cebpic/i2c-test.asm
index baffa73e50ad7f5103365f193650197246f9766f..d12325fd014a71c1eb4a6e344db4e16cd649dc96 100644 (file)
--- a/cebpic/i2c-test.asm
+++ b/cebpic/i2c-test.asm
@@ -16,7 +16,25 @@ FROMSERIAL   equ     0x1     ; byte 1: from-serial buffer location (in BSR5)
 TOTRACK                equ     0x2     ; byte 2: to-track buffer location (in BSR5)
 TOTRACKBIT     equ     0x3     ; byte 3: bit location of pointer within byte
 
-BUFFERPAGE     equ     5
+NMRA_BUFF_PAGE equ     5
+
+; flash locations for PIC-dependent info:
+
+F_PIC_NO_U     equ     20h     ; flash location of PIC number
+F_PIC_NO_H     equ     00h
+F_PIC_NO_L     equ     00h
+
+F_I2C_CTRL_U   equ     20h     ; flash location of i2c control byte
+F_I2C_CTRL_H   equ     00h
+F_I2C_CTRL_L   equ     01h
+
+; i2c specifit stuff
+
+I2C_BUFF_PAGE  equ     4       ; put i2c relevant stuff into buffer page 4
+PIC_NO         equ     00h     ; pic no goes to 400h
+I2C_CTRL       equ     01h     ; i2c ctrl bit goes to 401h
+
+
 
 
        ifdef   SLOW_VERSION
@@ -106,6 +124,29 @@ initialise
        bcf     IPR1,5,0        ; set to low-priority interrupt
 
 
+;----------------------------------------------------------------------------
+
+; copy PIC-dependent info out of flash memory
+
+       movlw   F_PIC_NO_U      ; set table pointer to point to
+       movwf   TBLPTRU         ; PIC number in flash
+       movlw   F_PIC_NO_H
+       movwf   TBLPTRH
+       movlw   F_PIC_NO_L
+       movwf   TBLPTRL
+
+       tblrd   *+              ; read then increment pointer 
+                               ; (now points to i2c control byte)
+
+       movlb   I2C_BUFF_PAGE   ; ser BSR=i2c BSR (4)
+       movff   TABLAT, PIC_NO  ; move pic number into normal memory
+
+       tblrd   *               ; read i2c 
+
+       movff   TABLAT, I2C_CTRL        ; move i2c_ctrl byte into normal memory
+
+; now have: PIC number in 400h, i2c control byte in 401h
+
 ;----------------------------------------------------------------------------
 
 ; i2c setup