intrh_fsr0_save ; point_set_pin uses FSR0, see below
rcall point_set_pin
intrh_fsr0_restore
- panic morse_UP
clr_f TMR3L ; also copies TMR3H into actual timer register
bs_f T3CON, TMR3ON
;----------
point_set_pin
-; Sets the pin appropriately:
+; Toggles the pin. The effect is:
; If we were idle, sets it H (to fire) unless pt0 in which case L
-; If we were firing, sets it L (to stop) unless pt0 in which case
+; If we were firing, sets it L (to stop) unless pt0 in which case H
;
; Called in various contexts, including both High and Low ISR.
;
; pointmsg point to start or stop firing preserved
-; Timer 3 enabled iff should stop now not interfered with
; W,STATUS any undefined
; FSR0 any undefined
; all other any not interfered with
mov_wf FSR0H ; FSR0H -> table
rl_fw pointmsg ; W = point addr, Z iff pt0
mov_wf FSR0L ; FSR0 -> &bit [Z still iff pt0]
- bt_f_if1 T3CON, TMR3ON ; Were we firing ? [Z still iff pt0]
- btg_f STATUS, Z ; Z iff (pt0 xor were_firing)
- bra_z point_set_pin_l
-
-point_set_pin_h
mov_fw POSTDEC0 ; W = bit, FSR0 -> &LAT*
bra_z point_nonexistent
mov_ff INDF0, FSR0L ; W = bit, FSR0L -> LAT*
set_f FSR0H ; FSR0 -> LAT*, W = bit (still)
- ior_wff INDF0 ; pin = H
+ xor_wff INDF0 ; pin = !pin
return
-;----------
-point_set_pin_l
- com_fw POSTDEC0 ; W = ~bit, FSR0 -> &LAT*
- mov_ff INDF0, FSR0L ; W = ~bit, FSR0L -> LAT*
- set_f FSR0H ; FSR0 -> LAT*, W = bit (still)
- and_wff INDF0 ; pin = H
-point_set_pin_hl
- tst_f_ifnz FSR0L ; err, did we just write to 0xf00 ?
- return ; no; good.
- ; oops, we did:
- if 0xf00 == RXF0SIDH
- ; This is actually OK; it's a `receive acceptance filter'
- ; for the CAN controller, writing to which has no side
- ; effects. And anyway the register starts at xxxx xxxx
- ; so if we don't care about CAN that's fine, and we're about
- ; to panic, of course.
- ; See DS p212 (register summary), p228 (description),
- ; p48 (location, 0xf00), p53 (POR value).
- else
- error "must check what 0xf00 is on this processor"
- endif
point_nonexistent
panic morse_PU