;====================================================================== ; panic.asm ; ; This file implements panic_routine, which is called by the ; `panic' macro in panic.inc. See panic.inc for the functionality ; of `panic'. include common.inc ;--------------------------------------------------------------------------- ; reserved access bank locations udata_acs psave_intcon res 1 psave_bsr res 1 panicst res 1 panicst_restart_i2c equ 7 panicst_acked equ 5 panic_vars_section udata 0x060 ; not available via access bank ; used in panic routine for temporary storage: flash_pattern res 1 morse_counter res 1 register_counter res 1 bit_counter res 1 panic_address res 1 ; condensed form of message start addr. panic_morse res 1 ; # bytes of morse msg in panic readout panic_regs res 1 ; # registers in panic readout t0l_count res 1 t0h_count res 1 psave_latc res 1 psave_t res 1 psave_tablat res 1 psave_tblptr res 3 psave_fsr0 res 2 psave_fsr1 res 2 psave_prod res 2 psave_stkptr res 1 stack_depth equ 31 panic_stack res stack_depth*3 ;**************************************************************************** code ;**************************************************************************** panic_routine ; switch off interrupts and power ; reconfigure timer0 for writing diagnostic msg to the LED mov_ff INTCON, psave_intcon bc_f INTCON, GIEH ; disable all interrupts mov_ff BSR, psave_bsr banksel flash_pattern mov_ff LATC, psave_latc ; now we have time to save registers etc ; (turning off interrupts is urgent (we might get interrupted while ; panicing which would be bad because we might forget to panic). mov_wf panic_address mov_ff t, psave_t mov_ff TABLAT, psave_tablat mov_ff TBLPTRL, psave_tblptr mov_ff TBLPTRH, psave_tblptr+1 mov_ff TBLPTRU, psave_tblptr+2 mov_ff FSR0L, psave_fsr0 mov_ff FSR0H, psave_fsr0+1 mov_ff FSR1L, psave_fsr1 mov_ff FSR1H, psave_fsr1+1 mov_ff PRODL, psave_prod mov_ff PRODH, psave_prod+1 mov_ff STKPTR, psave_stkptr mov_lfsr panic_stack + stack_depth*3 - 1, 0 mov_lw stack_depth mov_wf STKPTR stacksave_loop mov_ff TOSU, POSTDEC0 mov_ff TOSH, POSTDEC0 mov_ff TOSL, POSTDEC0 dec_f_ifnz STKPTR bra stacksave_loop clr_f STKPTR ; avoids stack overruns clr_f panicst bs_f picno, picno_panicd call panic_kill_hook ;x bt_f_if1 SSPCON1, SSPEN ;x bs_f panicst, panicst_restart_i2c ;x bc_f SSPCON1, SSPEN ; re-initialise timer0 config call read_pic_no bra_z panic_setup_if_master panic_setup_if_slave morse_t0setup sclock, (1<=panic_morse return ; return to panic tblrd *+ mov_ff TABLAT,flash_pattern rcall morse_readout inc_f morse_counter bra morse_loop ;-------------------------- morse_readout ; Flashes the per-pic led and black in a specified pattern. ; ; The pattern is specified as the state for 8 identically-long time ; periods each as long as a morse `dot', encoded into a byte with ; most significant bit first. ; On entry On exit ; W any undefined ; flash_pattern flash pattern preserved ; bit_counter any undefined mov_lw 9 mov_wf bit_counter rr_f flash_pattern morse_readout_loop dec_f_ifz bit_counter ; done all the bits yet ? return ; No: rl_f flash_pattern ; top bit goes into N, ;ie Negative if 1 bra_n morse_readout_if_led_1 morse_readout_if_led_0 call led_black bra morse_readout_endif_led morse_readout_if_led_1 call led_red morse_readout_endif_led rcall waiting bra morse_readout_loop ;-------------------------- ;-------------------------- registermsg register_msg_start clr_f register_counter ; clear loop counter register_loop mov_fw panic_regs cmp_fw_ifge register_counter ; if loop counter >=panic_regs return ; return to panic tblrd *+ mov_fw TABLAT ; TABLAT has the 8-bit version mov_wf FSR0L ; of the address. So, 8 bits ; go straight into FSR0L. mov_lw 0x0f ; For FSR0H, we see if the mov_fw FSR0H ; address XX is >=0x60. ; If it is then we meant 0xfXX; mov_lw 0x5f ; if not then we meant 0x0XX. cmp_fw_ifle FSR0L ; (This is just like PIC does clr_f FSR0H ; for insns using Access Bank) mov_ff INDF0,flash_pattern rcall register_readout inc_f register_counter ;increment loop counter rcall waiting8 bra register_loop ;-------------------------- register_readout ; Flashes the per-pic led red(0) and green(1) in a specified pattern. ; (black gap between each bit) ; ; The pattern is specified as the state for 8 identically-long time ; periods each as long as a morse `dot', encoded into a byte with ; most significant bit first. ; On entry On exit ; W any undefined ; flash_pattern flash pattern preserved ; bit_counter any undefined clr_f bit_counter ; clear loop counter rr_f flash_pattern register_readout_loop mov_lw 8 cmp_fw_ifge bit_counter ; if loop counter >=8 (register ; length), return return mov_lw 4 cmp_fw_ifne bit_counter ; if loop counter !=4 (nybble length), ; skip insertion of extra black space bra not_nybble_boundary rcall waiting4 not_nybble_boundary rl_f flash_pattern ; top bit goes into N flag, ; ie Negative if 1 bra_n register_readout_if_led_1 register_readout_if_led_0 call led_red bra register_readout_endif_led register_readout_if_led_1 call led_green register_readout_endif_led inc_f bit_counter ; increment loop counter rcall waiting call led_black rcall waiting bra register_readout_loop ;**************************************************************************** ; GENERAL SUBROUTINES ;---------------------------------------- waiting16 rcall waiting8 waiting8 rcall waiting4 waiting4 rcall waiting2 waiting2 rcall waiting waiting ; waits for a fixed interval, depending on the configuration of TMR0 bc_f INTCON,2 ; clear timer0 interrupt bit (p109) ; Interrupt happens on overflow. So start at 65535-morse_t0cycles: mov_fw t0h_count mov_wf TMR0H ; p107 set high byte of timer0 (buffered, ; only actually set when write to tmr0l occurs) mov_fw t0l_count mov_wf TMR0L ; set timer0 low byte - timer now set waiting_loop ; wait for timer0 interrupt, or some other interrupt bt_f_if1 INTCON,TMR0IF bra waiting_done bt_f_if0 SSPCON1, SSPEN bra waiting_loop ; no readouts if i2c is disabled bt_f_if1 idloc1, idloc1_master bra waiting_loop ; no readouts on master yet bt_f_if1 PIR1, SSPIF call i2cs_interrupt bra waiting_loop ;---------- waiting_done ;x bt_f_if0 panicst, panicst_restart_i2c return bc_f panicst, panicst_restart_i2c mov_lw picno and_lw 0x7f bra_z waiting_done_if_master call i2cs_init lgl call led_green bra lgl goto i2cs_init waiting_done_if_master return ;**************************************************************************** ; MEMORY READOUT ;---------- i2csu_write_panicd panicd_process_input_byte ; W instruction from host or master tst_w_ifnz bra write_ifnot_00 ; we've received 0x00: mov_lfsr 0,1 bs_f panicst, panicst_acked return ;---------- write_ifnot_00 bt_f_if0 panicst, panicst_acked ; well, ignore that ! return ; OK, we have an instruction: bt_w_if1 7 ; huh? return bt_w_if1 6 bra write_if_setpointer bt_f_if0 idloc1,idloc1_master return ; all the remaining options are for master only ;nyi bt_w_if1 5 ;nyi bra write_if_selectslave ;nyi bt_w_if1 4 ;nyi bra write_if_readout return ; huh ? ;---------- write_if_setpointer mov_wf t mov_lw 1<<6 mul_wf FSR1L mov_ff PRODH, FSR1H mov_fw t and_lw 0x3f ior_wfw PRODL mov_wf FSR1L return ;---------- i2csu_read_begin_panicd mov_lw 0x80 ; M0000000 bt_f_if0 panicst, panicst_acked goto i2cs_read_data ;... i2csu_read_panicd_ok mov_fw POSTINC1 goto i2cs_read_data ;---------- i2csu_read_another_panicd bt_f_if1 panicst, panicst_acked bra i2csu_read_panicd_ok ; not ok mov_lw 0x0b ; AARGH goto i2cs_read_data ;*************************************************************************** include final.inc