;######################################################################
; i2clib.inc - I2C LIBRARY - IMPLEMENTATION
;
; See i2clib.asm for documentation of the interface to this file.

 include /usr/share/gputils/header/p18f458.inc
 radix dec
 include ../iwjpictest/insn-aliases.inc

;============================================================
; COMMON ADMINISTRATIVE ROUTINES

		udata_acs

t		res	1

st		res	1
st_subsequent	equ	0

		code

;--------------------
i2cs_init
;	W		slave number		undefined
		rcall	slave2addr2
		mov_wf	SSPADD
		clr_f	st
		mov_lw	0x1e ; !SSPEN, CKP(release), I2C 7-bit slave S&P
		mov_wf	SSPCON1
		mov_lw	0x01 ; !GCEN, SEN
		mov_wf	SSPCON2
		mov_lw	0x8 ; SMP(noslew), !CKE, !BF(empty)
		mov_wf	SSPSTAT
		bs_f	TRISB, 0
		bs_f	TRISB, 1
		bc_f	IPR1, SSPIP
		bs_f	SSPCON1, SSPEN
		bs_f	PIE1, SSPIE
		return

;--------------------
i2cs_interrupt
		bt_f_if0 PIR1, SSPIF
		return

; We have an interrupt.  Firstly, clear the interrupt flag
; so that if something else happens while we faff, the interrupt
; will be regenerated:
		bc_f	PIR1, SSPIF

; Check that nothing is wrong:
		mov_fw	SSPCON1
		mov_wf	t
		and_lw	0xc0
		bra_nz	i2cs_interrupt_wcolsspov_endif
		panic	morse_SV
i2cs_interrupt_wcolsspov_endif

; Find out what's just happened:
		mov_ff	SSPSTAT, t

chkval macro mask, value, label
		mov_fw	t
 if mask ^ 0xff
		and_lw	mask
 endif
		xor_lw	value
		bra_z	label
		endm
			; bits we want to check
			;  80  60  20    10    08    04    02  01
			;  SMP CKE D_A   P     S     R_W   UA  BF
			;  set clr data? stop  start read? clr full?

		chkval	0xff, 0x90, s_case_writing_stop
		chkval	0xff, 0x89, s_case_addr_recv_write
		chkval	0xff, 0x8d, s_case_addr_recv_read
		chkval	0xff, 0xa9, s_case_write_data_recv
		chkval	0xff, 0xac, s_case_read_data_sent
		chkval	0xff, 0xa8, s_case_read_data_nack
		chkval	0xdb, 0x90, s_case_unknown_stop
		chkval	0xdb, 0x88, s_case_unknown_start

		mov_ff	t, WREG2 ; fixme
		panic	morse_SI

;----------
s_case_unknown_stop
s_case_unknown_start
		return

;----------
s_case_got_write_addr
		

		mov_fw	SSPBUF
		and_lw	0xfe
		bra_nz	nonzero

		mov_wf	t
		

		mov_fw	SSPSTAT
		and_lw	0xe7 ; all except P and S

		xor_lw	0x80
			; bits which might sensibly be set

chkval_last equ 0
chkval macro value, label
		xor_lw	value ^ chkval_last
		bra_z	label
chkval_last equ value
		endm
		chkval	0x80 ;     addr  dunno 

		mov_lw	0x8


		bt_f_if0 DATA_ADDRESS, SSPSTAT
		bra	data

slave2addr
; computes slave address in form suitable for use in i2c controller
; actual i2c slave address is (slave number) + 0b0001000
;	W		slave number		i2c address * 2
		add_lw	0b0001000
		rlc_w
		return




 include i2clib.inc
 end