1 ;======================================================================
4 ; This file implements panic_routine, which is called by the
5 ; `panic' macro in panic.inc. See panic.inc for the functionality
10 ;---------------------------------------------------------------------------
11 ; reserved access bank locations
19 panicst_restart_i2c equ 7
22 panic_vars_section udata 0x060 + maxpics ; not available via access bank
23 ; used in panic routine for temporary storage:
27 register_counter res 1
30 panic_address res 1 ; condensed form of message start addr.
31 panic_morse res 1 ; # bytes of morse msg in panic readout
32 panic_regs res 1 ; # registers in panic readout
47 panic_stack res stack_depth*3
49 ;****************************************************************************
53 ;****************************************************************************
57 ; switch off interrupts and power
58 ; reconfigure timer0 for writing diagnostic msg to the LED
60 mov_ff INTCON, psave_intcon
61 bc_f INTCON, GIEH ; disable all interrupts
66 mov_ff LATC, psave_latc
68 ; now we have time to save registers etc
69 ; (turning off interrupts is urgent (we might get interrupted while
70 ; panicing which would be bad because we might forget to panic).
75 mov_ff TABLAT, psave_tablat
76 mov_ff TBLPTRL, psave_tblptr
77 mov_ff TBLPTRH, psave_tblptr+1
78 mov_ff TBLPTRU, psave_tblptr+2
79 mov_ff FSR0L, psave_fsr0
80 mov_ff FSR0H, psave_fsr0+1
81 mov_ff FSR1L, psave_fsr1
82 mov_ff FSR1H, psave_fsr1+1
83 mov_ff PRODL, psave_prod
84 mov_ff PRODH, psave_prod+1
85 mov_ff STKPTR, psave_stkptr
87 mov_lfsr panic_stack + stack_depth*3 - 1, 0
97 clr_f STKPTR ; avoids stack overruns
99 bs_f picno, picno_panicd
103 ; re-initialise timer0 config
105 bra_z panic_setup_if_master
107 morse_t0setup sclock, (1<<TMR0ON), t0l_count, t0h_count
108 bra panic_setup_endif_masterslave
109 panic_setup_if_master
110 morse_t0setup mclock, (1<<TMR0ON), t0l_count, t0h_count
111 panic_setup_endif_masterslave
113 ; get # bytes of morse msg, # registers in panic readout, message start addr.
114 ; back from condensed message start addr. stored in panic_address
117 mov_lw 4 ; size of each message's details
121 add_lw (morse_messages_start)/256
125 tblrd *+ ; read 1st byte of error message
126 ; (gives # bytes morse, # bytes registers)
127 dw 0xffff ; silicon errata: B4 issue 4
129 mov_ff TABLAT,panic_morse
131 and_wff panic_morse ; panic_morse now contains # bytes of morse msgs
133 mov_ff TABLAT,panic_regs
136 swap_f panic_regs ; panic_regs now contains # registers to read
140 rcall morsemsg ; transmit morse in red
144 rcall registermsg ; transmit contents of registers in
145 ; red(=low) and blue(=high)
149 ;****************************************************************************
153 ; wrapper round morse_readout to flash the per-pic led red for a morse msg
156 clr_f morse_counter ; clear loop counter
160 cmp_fw_ifge morse_counter ; if loop counter >=panic_morse
161 return ; return to panic
164 mov_ff TABLAT,flash_pattern
170 ;--------------------------
173 ; Flashes the per-pic led and black in a specified pattern.
175 ; The pattern is specified as the state for 8 identically-long time
176 ; periods each as long as a morse `dot', encoded into a byte with
177 ; most significant bit first.
180 ; flash_pattern flash pattern preserved
181 ; bit_counter any undefined
188 dec_f_ifz bit_counter ; done all the bits yet ?
192 rl_f flash_pattern ; top bit goes into N,
194 bra_n morse_readout_if_led_1
196 morse_readout_if_led_0
198 bra morse_readout_endif_led
200 morse_readout_if_led_1
203 morse_readout_endif_led
205 bra morse_readout_loop
207 ;--------------------------
208 ;--------------------------
212 clr_f register_counter ; clear loop counter
216 cmp_fw_ifge register_counter ; if loop counter >=panic_regs
217 return ; return to panic
221 mov_fw TABLAT ; TABLAT has the 8-bit version
222 mov_wf FSR0L ; of the address. So, 8 bits
223 ; go straight into FSR0L.
225 mov_lw 0x0f ; For FSR0H, we see if the
226 mov_fw FSR0H ; address XX is >=0x60.
227 ; If it is then we meant 0xfXX;
228 mov_lw 0x5f ; if not then we meant 0x0XX.
229 cmp_fw_ifle FSR0L ; (This is just like PIC does
230 clr_f FSR0H ; for insns using Access Bank)
232 mov_ff INDF0,flash_pattern
233 rcall register_readout
235 inc_f register_counter ;increment loop counter
240 ;--------------------------
244 ; Flashes the per-pic led red(0) and green(1) in a specified pattern.
245 ; (black gap between each bit)
247 ; The pattern is specified as the state for 8 identically-long time
248 ; periods each as long as a morse `dot', encoded into a byte with
249 ; most significant bit first.
252 ; flash_pattern flash pattern preserved
253 ; bit_counter any undefined
255 clr_f bit_counter ; clear loop counter
259 register_readout_loop
261 cmp_fw_ifge bit_counter ; if loop counter >=8 (register
266 cmp_fw_ifne bit_counter ; if loop counter !=4 (nybble length),
267 ; skip insertion of extra black space
268 bra not_nybble_boundary
272 rl_f flash_pattern ; top bit goes into N flag,
274 bra_n register_readout_if_led_1
276 register_readout_if_led_0
278 bra register_readout_endif_led
280 register_readout_if_led_1
283 register_readout_endif_led
284 inc_f bit_counter ; increment loop counter
288 bra register_readout_loop
291 ;****************************************************************************
292 ; GENERAL SUBROUTINES
294 ;----------------------------------------
295 waiting16 rcall waiting8
296 waiting8 rcall waiting4
297 waiting4 rcall waiting2
298 waiting2 rcall waiting
300 ; waits for a fixed interval, depending on the configuration of TMR0
302 bc_f INTCON,2 ; clear timer0 interrupt bit (p109)
303 ; Interrupt happens on overflow. So start at 65535-morse_t0cycles:
305 mov_wf TMR0H ; p107 set high byte of timer0 (buffered,
306 ; only actually set when write to tmr0l occurs)
308 mov_wf TMR0L ; set timer0 low byte - timer now set
309 waiting_loop ; wait for timer0 interrupt, or some other interrupt
310 bt_f_if1 INTCON,TMR0IF
313 bt_f_if0 SSPCON1, SSPEN
314 bra waiting_loop ; no readouts if i2c is disabled
316 bt_f_if1 idloc1, idloc1_master
317 bra waiting_loop ; no readouts on master yet
326 ;x bt_f_if0 panicst, panicst_restart_i2c
328 bc_f panicst, panicst_restart_i2c
331 bra_z waiting_done_if_master
338 waiting_done_if_master
341 ;****************************************************************************
346 panicd_process_input_byte
347 ; W instruction from host or master
350 ; we've received 0x00:
353 bs_f panicst, panicst_acked
358 bt_f_if0 panicst, panicst_acked ; well, ignore that !
360 ; OK, we have an instruction:
365 bra panic_crashread_setpointer
366 bt_f_if0 idloc1,idloc1_master
367 return ; all the remaining options are for master only
369 ;nyi bra write_if_selectslave
371 ;nyi bra write_if_readout
375 panic_crashread_setpointer
376 ; W byte from master or host undefined
377 ; FSR1* crashread pointer updated
378 ; t, STATUS, PROD* any undefined
379 ; all others any preserved
391 panic_crashread_commanded
392 bs_f panicst, panicst_acked ; since we were asked to
396 i2csu_read_begin_panicd
397 mov_lw 0x80 ; M0000000
398 bt_f_if0 panicst, panicst_acked
406 i2csu_read_another_panicd
407 bt_f_if1 panicst, panicst_acked
408 bra i2csu_read_panicd_ok
418 ;***************************************************************************