1 ;======================================================================
4 ; This file implements panic_routine, which is called by the
5 ; `panic' macro in panic.inc. See panic.inc for the functionality
10 ;---------------------------------------------------------------------------
11 ; reserved access bank locations
19 panicst_restart_i2c equ 7
21 panicst_ferroerr equ 4
22 panicst_writeslave equ 3
26 panic_vars_section udata 0x060 + maxpics ; not available via access bank
27 ; used in panic routine for temporary storage:
31 register_counter res 1
34 panic_address res 1 ; condensed form of message start addr.
35 panic_morse res 1 ; # bytes of morse msg in panic readout
36 panic_regs res 1 ; # registers in panic readout
51 panic_stack res stack_depth*3
53 ;****************************************************************************
57 ;****************************************************************************
61 ; switch off interrupts and power
62 ; reconfigure timer0 for writing diagnostic msg to the LED
64 mov_ff INTCON, psave_intcon
65 bc_f INTCON, GIEH ; disable all interrupts
70 mov_ff LATC, psave_latc
72 ; now we have time to save registers etc
73 ; (turning off interrupts is urgent (we might get interrupted while
74 ; panicing which would be bad because we might forget to panic).
79 mov_ff TABLAT, psave_tablat
80 mov_ff TBLPTRL, psave_tblptr
81 mov_ff TBLPTRH, psave_tblptr+1
82 mov_ff TBLPTRU, psave_tblptr+2
83 mov_ff FSR0L, psave_fsr0
84 mov_ff FSR0H, psave_fsr0+1
85 mov_ff FSR1L, psave_fsr1
86 mov_ff FSR1H, psave_fsr1+1
87 mov_ff PRODL, psave_prod
88 mov_ff PRODH, psave_prod+1
89 mov_ff STKPTR, psave_stkptr
91 mov_lfsr panic_stack + stack_depth*3 - 1, 0
101 clr_f STKPTR ; avoids stack overruns
106 ; re-initialise timer0 config
108 bra_z panic_setup_if_master
110 morse_t0setup sclock, (1<<TMR0ON), t0l_count, t0h_count
111 bra panic_setup_endif_masterslave
112 panic_setup_if_master
113 morse_t0setup mclock, (1<<TMR0ON), t0l_count, t0h_count
114 panic_setup_endif_masterslave
116 ; get # bytes of morse msg, # registers in panic readout, message start addr.
117 ; back from condensed message start addr. stored in panic_address
120 mov_lw 4 ; size of each message's details
124 add_lw (morse_messages_start)/256
128 tblrd *+ ; read 1st byte of error message
129 ; (gives # bytes morse, # bytes registers)
130 dw 0xffff ; silicon errata: B4 issue 4
132 mov_ff TABLAT,panic_morse
134 and_wff panic_morse ; panic_morse now contains # bytes of morse msgs
136 mov_ff TABLAT,panic_regs
139 swap_f panic_regs ; panic_regs now contains # registers to read
143 rcall morsemsg ; transmit morse in red
147 rcall registermsg ; transmit contents of registers in
148 ; red(=low) and blue(=high)
152 ;****************************************************************************
156 ; wrapper round morse_readout to flash the per-pic led red for a morse msg
159 clr_f morse_counter ; clear loop counter
163 cmp_fw_ifge morse_counter ; if loop counter >=panic_morse
164 return ; return to panic
167 mov_ff TABLAT,flash_pattern
173 ;--------------------------
176 ; Flashes the per-pic led and black in a specified pattern.
178 ; The pattern is specified as the state for 8 identically-long time
179 ; periods each as long as a morse `dot', encoded into a byte with
180 ; most significant bit first.
183 ; flash_pattern flash pattern preserved
184 ; bit_counter any undefined
191 dec_f_ifz bit_counter ; done all the bits yet ?
195 rl_f flash_pattern ; top bit goes into N,
197 bra_n morse_readout_if_led_1
199 morse_readout_if_led_0
201 bra morse_readout_endif_led
203 morse_readout_if_led_1
206 morse_readout_endif_led
208 bra morse_readout_loop
210 ;--------------------------
211 ;--------------------------
215 clr_f register_counter ; clear loop counter
219 cmp_fw_ifge register_counter ; if loop counter >=panic_regs
220 return ; return to panic
224 mov_fw TABLAT ; TABLAT has the 8-bit version
225 mov_wf FSR0L ; of the address. So, 8 bits
226 ; go straight into FSR0L.
228 mov_lw 0x0f ; For FSR0H, we see if the
229 mov_fw FSR0H ; address XX is >=0x60.
230 ; If it is then we meant 0xfXX;
231 mov_lw 0x5f ; if not then we meant 0x0XX.
232 cmp_fw_ifle FSR0L ; (This is just like PIC does
233 clr_f FSR0H ; for insns using Access Bank)
235 mov_ff INDF0,flash_pattern
236 rcall register_readout
238 inc_f register_counter ;increment loop counter
243 ;--------------------------
247 ; Flashes the per-pic led red(0) and green(1) in a specified pattern.
248 ; (black gap between each bit)
250 ; The pattern is specified as the state for 8 identically-long time
251 ; periods each as long as a morse `dot', encoded into a byte with
252 ; most significant bit first.
255 ; flash_pattern flash pattern preserved
256 ; bit_counter any undefined
258 clr_f bit_counter ; clear loop counter
262 register_readout_loop
264 cmp_fw_ifge bit_counter ; if loop counter >=8 (register
269 cmp_fw_ifne bit_counter ; if loop counter !=4 (nybble length),
270 ; skip insertion of extra black space
271 bra not_nybble_boundary
275 rl_f flash_pattern ; top bit goes into N flag,
277 bra_n register_readout_if_led_1
279 register_readout_if_led_0
281 bra register_readout_endif_led
283 register_readout_if_led_1
286 register_readout_endif_led
287 inc_f bit_counter ; increment loop counter
291 bra register_readout_loop
294 ;****************************************************************************
295 ; GENERAL SUBROUTINES
297 ;----------------------------------------
298 waiting16 rcall waiting8
299 waiting8 rcall waiting4
300 waiting4 rcall waiting2
301 waiting2 rcall waiting
303 ; waits for a fixed interval, depending on the configuration of TMR0
305 bc_f INTCON,2 ; clear timer0 interrupt bit (p109)
306 ; Interrupt happens on overflow. So start at 65535-morse_t0cycles:
308 mov_wf TMR0H ; p107 set high byte of timer0 (buffered,
309 ; only actually set when write to tmr0l occurs)
311 mov_wf TMR0L ; set timer0 low byte - timer now set
312 waiting_loop ; wait for timer0 interrupt, or some other interrupt
313 bt_f_if1 INTCON,TMR0IF
316 bt_f_if1 idloc1, idloc1_master
320 bt_f_if0 SSPCON1, SSPEN
321 bra waiting_loop ; no readouts if i2c is disabled
322 ; slave, i2c enabled:
325 call pan_i2cs_interrupt
329 ;----------------------------------------
330 ; MASTER'S PANIC SERIAL PORT HANDLING
332 ;--------------------
334 bt_f_if1 PIR1,RCIF ; host sent us something ?
337 bt_f_if0 SSPCON1, SSPEN
339 ; master, i2c enabled:
342 rcall pan_i2cm_interrupt
349 bra_nz panicd_serialrx_err_loop
350 ; yay! host ack'd ferr/oerr
351 bc_f panicst, panicst_ferroerr
352 return ; return from panicd_serialrx
356 bs_f panicst, panicst_ferroerr
358 bc_f RCSTA, RCEN ; disable } to clear FERR/OERR
359 mov_fw RCREG ; read RCREG } (see PIC18FXX8 DS p182)
360 bs_f RCSTA, RCEN ; reenable }
361 panicd_serialrx_err_loop
362 bt_f_if0 PIR1, RCIF ; wait for a byte 0x01 to ack the overrun/error
363 bra panicd_serialrx_err_loop
368 bra panicd_serialrx_err
370 bra panicd_serialrx_err
371 bt_f_if1 panicst, panicst_ferroerr
374 ;****************************************************************************
379 panicd_process_input_byte
380 ; W instruction from host or master
383 ; we've received 0x00:
386 bs_f panicst, panicst_acked
391 bt_f_if0 panicst, panicst_acked ; well, ignore that !
393 ; OK, we have an instruction:
396 bra write_if_setbytetowrite
398 bra panic_crashread_setpointer
399 bt_f_if0 idloc1,idloc1_master
400 return ; all the remaining options are for master only
402 bra write_if_master_slaveselect
404 bra write_if_master_masterread
405 bra write_if_master_slaveread
409 panic_crashread_setpointer
410 ; W byte from master or host undefined
411 ; FSR1* crashread pointer updated
412 ; t, STATUS, PROD* any undefined
413 ; all others any preserved
424 ;======================================================================
425 ; MASTER READOUT AND MASTER READOUT OF SLAVES
428 write_if_setbytetowrite
429 bt_f_if0 idloc1,idloc1_master
430 return ; for master only
433 mov_wf panic_valcount
434 bs_f panicst, panicst_writeslave
438 write_if_master_slaveread
439 mov_wf panic_valcount
440 bc_f panicst, panicst_writeslave
444 write_if_master_slaveselect
446 bt_f_if1 panicst, panicst_writeslave
447 bra pan_i2cm_write_start
448 bra pan_i2cm_read_start
451 write_if_master_masterread
453 mov_wf panic_valcount
454 write_if_master_masterread_loop
456 call serial_write_char
457 dec_fw_ifnz panic_valcount
458 bra write_if_master_masterread_loop
462 pan_i2cmu_read_got_byte
463 call serial_write_char
464 dec_fw_ifnz panic_valcount
465 bra pan_i2cm_read_another
469 pan_i2cmu_write_next_byte
470 mov_fw panic_valcount
472 bt_f_if1 panicst, panicst_writeslave
474 bc_f panicst, panicst_writeslave
480 goto serial_write_char
482 ;======================================================================
487 pan_i2csu_write_begin
492 mov_lw 0x80 ; M0000000
493 bt_f_if0 panicst, panicst_acked
501 pan_i2csu_read_another
502 bt_f_if1 panicst, panicst_acked
503 bra i2csu_read_panicd_ok
513 near_serialrx_table code 0x2100
516 panic_crashread_commanded
517 bs_f panicst, panicst_acked ; since we were asked to
520 ;***************************************************************************