1 ;######################################################################
2 ; i2clib.inc - I2C LIBRARY - IMPLEMENTATION
4 ; See i2clib.asm for documentation of the interface to this file.
6 include /usr/share/gputils/header/p18f458.inc
8 include ../iwjpictest/insn-aliases.inc
10 ;============================================================
11 ; COMMON ADMINISTRATIVE ROUTINES
24 ; W slave number undefined
28 mov_lw 0x1e ; !SSPEN, CKP(release), I2C 7-bit slave S&P
30 mov_lw 0x01 ; !GCEN, SEN
32 mov_lw 0x8 ; SMP(noslew), !CKE, !BF(empty)
46 ; We have an interrupt. Firstly, clear the interrupt flag
47 ; so that if something else happens while we faff, the interrupt
48 ; will be regenerated:
51 ; Check that nothing is wrong:
55 bra_nz i2cs_interrupt_wcolsspov_endif
57 i2cs_interrupt_wcolsspov_endif
59 ; Find out what's just happened:
62 chkval macro mask, value, label
70 ; bits we want to check
71 ; 80 60 20 10 08 04 02 01
72 ; SMP CKE D_A P S R_W UA BF
73 ; set clr data? stop start read? clr full?
75 chkval 0xff, 0x90, s_case_writing_stop
76 chkval 0xff, 0x89, s_case_addr_recv_write
77 chkval 0xff, 0x8d, s_case_addr_recv_read
78 chkval 0xff, 0xa9, s_case_write_data_recv
79 chkval 0xff, 0xac, s_case_read_data_sent
80 chkval 0xff, 0xa8, s_case_read_data_nack
81 chkval 0xdb, 0x90, s_case_unknown_stop
82 chkval 0xdb, 0x88, s_case_unknown_start
84 mov_ff t, WREG2 ; fixme
104 and_lw 0xe7 ; all except P and S
107 ; bits which might sensibly be set
110 chkval macro value, label
111 xor_lw value ^ chkval_last
113 chkval_last equ value
115 chkval 0x80 ; addr dunno
120 bt_f_if0 DATA_ADDRESS, SSPSTAT
124 ; computes slave address in form suitable for use in i2c controller
125 ; actual i2c slave address is (slave number) + 0b0001000
126 ; W slave number i2c address * 2