1 ;######################################################################
2 ; i2clib.inc - I2C LIBRARY - IMPLEMENTATION
4 ; See i2clib.asm for documentation of the interface to this file.
6 include /usr/share/gputils/header/p18f458.inc
8 include ../iwjpictest/insn-aliases.inc
10 ;============================================================
11 ; COMMON ADMINISTRATIVE ROUTINES
24 ; W slave number undefined
28 mov_lw 0x1e ; !SSPEN, CKP(release), I2C 7-bit slave S&P
30 mov_lw 0x01 ; !GCEN, SEN
32 mov_lw 0x8 ; SMP(noslew), !CKE, !BF(empty)
46 ; We have an interrupt. Firstly, clear the interrupt flag
47 ; so that if something else happens while we faff, the interrupt
48 ; will be regenerated:
51 ; Check that nothing is wrong:
55 bra_nz i2cs_interrupt_wcolsspov_endif
57 i2cs_interrupt_wcolsspov_endif
59 ; Find out what's just happened:
61 ; bits we want to check
62 ; 80 60 20 10 08 04 02 01
63 ; SMP CKE D_A P S R_W UA BF
64 ; set clr data? stop start read? clr full?
70 ; So it should be stop
73 xor_lw 0x90 ; SMP, !CKE, P; !S, !R_W, !UA, !BF
77 bt_f_if0 st, st_writing
80 ; Yes, we were receiving:
83 ; tail call; we couldn't do anything after that
84 ; anyway since it might well reenter us.
90 bt_f_if1 t, R_W ;read?
91 bra si_if_bufferempty_reading
92 si_if_bufferempty_notreading
93 ; So we think this is just a START (which we want to ignore)
96 xor_lw 0x88 ; SMP, !CKE, !P; S, !R_W, !UA, !BF
105 chkval macro mask, value, label
113 ; bits we want to check
114 ; 80 60 20 10 08 04 02 01
115 ; SMP CKE D_A P S R_W UA BF
116 ; set clr data? stop start read? clr full?
118 chkval 0xff, 0x90, s_case_writing_stop
119 chkval 0xff, 0x89, s_case_addr_recv_write
120 chkval 0xff, 0x8d, s_case_addr_recv_read
121 chkval 0xff, 0xa9, s_case_write_data_recv
122 chkval 0xff, 0xac, s_case_read_data_sent
123 chkval 0xff, 0xa8, s_case_read_data_nack
124 chkval 0xdb, 0x90, s_case_unknown_stop
125 chkval 0xdb, 0x88, s_case_unknown_start
127 mov_ff t, WREG2 ; fixme
136 s_case_got_write_addr
147 and_lw 0xe7 ; all except P and S
150 ; bits which might sensibly be set
153 chkval macro value, label
154 xor_lw value ^ chkval_last
156 chkval_last equ value
158 chkval 0x80 ; addr dunno
163 bt_f_if0 DATA_ADDRESS, SSPSTAT
167 ; computes slave address in form suitable for use in i2c controller
168 ; actual i2c slave address is (slave number) + 0b0001000
169 ; W slave number i2c address * 2