chiark / gitweb /
timer2 ticker wip
[trains.git] / detpic / common.inc
1 ;======================================================================
2 ; common.inc
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
5
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8         include         /usr/share/gputils/header/p18f458.inc
9         radix           dec 
10         include         panic.inc
11         include         morse+auto.inc
12         include         ../iwjpictest/insn-aliases.inc
13 clock equ -1
14         include         ../iwjpictest/clockvaries.inc
15         include         variables+vars.inc
16         include         pindata.inc
17         include         program+clocks.inc
18         include         i2clib.incm
19
20 ;----------------------------------------------------------------------
21 ; Common conventions for function register notation:
22
23 ;                       Master                  Slave
24 ; Registers etc.
25 ;   W                   Trashed                 Trashed
26 ;   STATUS              Trashed                 Trashed
27 ;   BSR                 Not used                Not used
28 ;   t                   Low ISR                 Low ISR
29 ;   TBLPTR*,TABLAT      Low ISR                 Low ISR
30 ;   PROD*               Low ISR                 Low ISR
31 ;   FSR0                Low ISR                 Low ISR
32 ;   PCLATU              Always set to 0         Not used
33 ;   PCLATH              Low ISR                 Not used
34 ;   t_dolocal           Low ISR                 High ISR
35 ;   FSR1                Low ISR                 High ISR (detect[1])
36 ;   FSR2                Low ISR                 High ISR (detect[1])
37 ;
38 ; Trashed       May be trashed by any routine anywhere.  Saved
39 ;               during every ISR entry/exit.
40 ;
41 ; Low ISR       May be used/traashed by any routine run in low-priority
42 ;               interrupt, or any routine run during initialisation.
43 ;               May therefore not be used in background loop with
44 ;               interrupts enabled.  May not be used by high-priority
45 ;               ISR (unless explicitly saved, eg isrh_fsr0_{save,restore}).
46 ;
47 ; High ISR      May be used/trashed by any routine run in high-priority
48 ;               interrupt, or any routine run during initialisation.
49 ;               May therefore not be used elsewhere with interrupts
50 ;               enabled.
51 ;
52 ;               Only the routines specially noted as intended to
53 ;               be called from the High ISR are safe.
54 ;
55 ; ... (subsystem)
56 ;               Register is reserved for use by this subsystem, which
57 ;               is allowed to expect the value to be preserved.
58 ;               Anything else which uses it must save and restore (and
59 ;               may also need to disable interrupts, depending on its
60 ;               relative status).
61 ;
62 ; Not High      May be used by any routine not running in high-priority
63 ;               interrupt.  Not saved by high-priority interrupt
64 ;               entry/exit, so any high-priority interrupt routine which
65 ;               uses this register must save and restore it.
66 ;
67 ; A routine which is allowed to trash a register may document that it
68 ; saves that register for the benefit of its callers.
69 ;
70 ;  [1]  FSR1 and FSR2 on slave pics are reserved exclusively for the
71 ;       I2C response and detection code (detect.asm), after det_slave_init.
72 ;
73 ; General-purpose hardware allocation:
74 ;
75 ;                       Master                  Slave
76 ;  Timer 0              nmra                    Disabled
77 ;  Timer 2              tick: 10ms, int. low    -
78 ;  Timer 1              -                       -
79 ;  CCP1                 -                       -
80 ;  Timer 3              point fire timer        point fire timer
81 ;  ECCP                 -                       -
82 ;
83 ;   (...) indicates that this is a projected use, NYI
84
85 ;----------------------------------------------------------------------
86 ; Conventional routine names:
87 ;
88 ; <periph>_local_do     Process a master-to-slave command to activate
89 ;                       a local peripheral, in High ISR.  Also called
90 ;                       on master in Low ISR to activate its own
91 ;                       local peripherals.  NB strange calling convention!
92 ;
93 ; <periph>_local_init   Initialises RAM tables for local peripheral
94 ;                       and arranges for pins to be set in appropriate
95 ;                       quiescent state.  Configures pic built-in
96 ;                       peripherals.
97 ;
98 ; <periph>_local_intrl  Low ISR service routine for peripheral (see below).
99 ;                               
100 ; command_<periph>      Called when an appropriate message has been
101 ;                       received from the host.
102 ;
103 ; <something>_intrl     Low ISR service routine.
104 ;                       Checks for any relevant interrupt.
105 ;                       If not, just returns.
106 ;                       If found, services it and then does either
107 ;                        intrl_handled or intrl_handled_nostack
108 ;                        neither of which return; the latter is
109 ;                        faster but implies a promise 
110 ;
111 ;----------------------------------------------------------------------
112 ; MACROS
113
114 ;----------------------------------------
115 ; For entering and leaving Low ISR, saving and restoring STATUS and W
116 ; See above under <something>_intrl, and {master,slave}_interrupt_low
117
118 enter_interrupt_low macro
119         mov_ff  STATUS, isr_low_save_status
120         mov_wf  isr_low_save_w
121         mov_ff  STKPTR, isr_low_save_stkptr
122         endm
123
124 intrh_fsr0_save macro
125         mov_ff  FSR0L, isr_high_save_fsr0
126         mov_ff  FSR0H, isr_high_save_fsr0+1
127         endm
128
129 intrh_fsr0_restore macro
130         mov_ff  isr_high_save_fsr0,   FSR0L
131         mov_ff  isr_high_save_fsr0+1, FSR0H
132         endm
133
134 intrl_handled_core macro ; for internal use only
135         mov_fw  isr_low_save_w
136         mov_ff  isr_low_save_status, STATUS
137         retfie
138         endm
139
140 intrl_handled_nostack macro
141         pop     ; undo the `call' from the original ISR
142         intrl_handled_core
143         endm
144
145 intrl_handled macro
146         goto    intrl_handled_routine
147         endm
148
149 ;----------------------------------------
150 ; For disabling all interrupts, to make a critical section:
151 ; (for use from main program and Low ISR only)
152 ;
153 ;  GIEH                 modified appropriately
154 ;  everything else      preserved
155
156 intrh_mask macro
157         bc_f    INTCON,GIEH
158         endm
159
160 intrh_unmask macro
161         bs_f    INTCON,GIEH
162         endm
163
164 ;----------------------------------------
165 ; For the fix specified in the silicon errata:
166 ; silicon revision B4 issue 4
167 ;
168 ;                       Before          After
169 ;  TABLAT               any             data from flash
170 ;  TBLPTR*              correct         incremented/decremented
171 ;  everything else      any             preserved
172
173 tblrd_postinc_fixup macro
174         tblrd   *+
175         dw      0xffff
176         endm
177
178 tblrd_postdec_fixup macro
179         tblrd   *-
180         dw      0xffff
181         endm
182
183 ;----------------------------------------
184 ; For setting up TBLPTR according to the picno
185
186 load_perpic_tblptr macro flash_map_base, perpic_entry_size
187 ;
188 ;                       Before          After
189 ;  TBLPTR*              any             set
190 ;  W, STATUS, PROD*     any             undefined
191 ;  everything else      any             preserved
192 ;
193         mov_lw  perpic_entry_size
194         mul_wf  picno
195
196         mov_lw  flash_map_base & 0xff
197         add_wfw PRODL
198         mov_wf  TBLPTRL
199
200         mov_lw  flash_map_base >> 8
201         addc_wfw PRODH
202         mov_wf  TBLPTRH
203
204         clr_f   TBLPTRU         ; TBLPTR* -> our point data
205         endm
206
207 ;----------------------------------------------------------------------
208 ; PINSPECS stuff
209 ;
210 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
211 ; and <port> is 0 1 2 3 4 5 6 7.  Generally p<picno>_<subsystem>_<pin>
212 ; are equ'd for this.
213
214  radix hex
215 p0_cdu_enable           equ     5b
216 p0_rs232_fcin           equ     4b
217 p0_booster_shutdown     equ     2b
218 p0_booster_overload     equ     1b
219 p0_booster_userfault    equ     0b
220 p0_spare2               equ     6d
221 p0_spare1               equ     5d
222 p0_rs232_fcout          equ     5c
223 pall_perpicled          equ     2d
224 pall_pt0reverse         equ     7b
225 p0_spare0               equ     0a
226 p0_booster_dirn         equ     0c
227 p0_booster_pwm          equ     1c
228  radix dec
229
230 ;                       
231 ;  LAT*                 may be subject to read-modify-write, see below
232 ;  TRIS*                may be subject to read-modify-write, see below
233 ;  PORT*                may be read, see below
234 ;  everything else      untouched
235 ;
236 ;                       LAT*<bit>       TRIS*<bit>      PORT*
237 ;  pin_z                untouched       set             untouched
238 ;  pin_h                set             cleared         untouched
239 ;  pin_l                cleared         cleared         untouched
240 ;  pin_nz               untouched       cleared         untouched
241 ;  pin_vh               set             untouched       untouched
242 ;  pin_vl               cleared         untouched       untouched
243 ;  pin_ifh              untouched       untouched       read
244 ;  pin_ifl              untouched       untouched       read
245
246 pin_z   macro   pinspec
247         bs_f    TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
248         endm
249
250 pin_nz  macro   pinspec
251         bc_f    TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
252         endm
253
254 pin_vh  macro   pinspec
255         bs_f    LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
256         endm
257
258 pin_vl  macro   pinspec
259         bc_f    LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
260         endm
261
262 pin_h   macro   pinspec
263         pin_vh  pinspec
264         pin_nz  pinspec
265         endm
266
267 pin_l   macro   pinspec
268         pin_vl  pinspec
269         pin_nz  pinspec
270         endm
271
272 pin_ifh macro   pinspec
273         bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
274         endm
275
276 pin_ifl macro   pinspec
277         bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
278         endm
279
280 ;----------------------------------------------------------------------