1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
17 include program+clocks.inc
20 ;----------------------------------------------------------------------
21 ; Common conventions for function register notation:
26 ; STATUS Trashed Trashed
27 ; BSR Not used Not used
29 ; TBLPTR*,TABLAT Low ISR Low ISR
30 ; PROD* Low ISR Low ISR
31 ; FSR0 Low ISR Low ISR
32 ; PCLATU Always set to 0 Not used
33 ; PCLATH Low ISR Not used
34 ; t_dolocal Low ISR High ISR
35 ; FSR1 Low ISR High ISR (detect[1])
36 ; FSR2 Low ISR High ISR (detect[1])
38 ; Trashed May be trashed by any routine anywhere. Saved
39 ; during every ISR entry/exit.
41 ; Low ISR May be used/traashed by any routine run in low-priority
42 ; interrupt, or any routine run during initialisation.
43 ; May therefore not be used in background loop with
44 ; interrupts enabled. May not be used by high-priority
45 ; ISR (unless explicitly saved, eg isrh_fsr0_{save,restore}).
47 ; High ISR May be used/trashed by any routine run in high-priority
48 ; interrupt, or any routine run during initialisation.
49 ; May therefore not be used elsewhere with interrupts
52 ; Only the routines specially noted as intended to
53 ; be called from the High ISR are safe.
56 ; Register is reserved for use by this subsystem, which
57 ; is allowed to expect the value to be preserved.
58 ; Anything else which uses it must save and restore (and
59 ; may also need to disable interrupts, depending on its
62 ; Not High May be used by any routine not running in high-priority
63 ; interrupt. Not saved by high-priority interrupt
64 ; entry/exit, so any high-priority interrupt routine which
65 ; uses this register must save and restore it.
67 ; A routine which is allowed to trash a register may document that it
68 ; saves that register for the benefit of its callers.
70 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
71 ; I2C response and detection code (detect.asm), after det_slave_init.
73 ; General-purpose hardware allocation:
76 ; Timer 0 nmra Disabled
77 ; Timer 2 (10ms tick, int. low) -
80 ; Timer 3 point fire timer point fire timer
83 ; (...) indicates that this is a projected use, NYI
85 ;----------------------------------------------------------------------
86 ; Conventional routine names:
88 ; <periph>_local_do Process a master-to-slave command to activate
89 ; a local peripheral, in High ISR. Also called
90 ; on master in Low ISR to activate its own
91 ; local peripherals. NB strange calling convention!
93 ; <periph>_local_init Initialises RAM tables for local peripheral
94 ; and arranges for pins to be set in appropriate
95 ; quiescent state. Configures pic built-in
98 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
100 ; command_<periph> Called when an appropriate message has been
101 ; received from the host.
103 ; <something>_intrl Low ISR service routine.
104 ; Checks for any relevant interrupt.
105 ; If not, just returns.
106 ; If found, services it and then does either
107 ; intrl_handled or intrl_handled_nostack
108 ; neither of which return; the latter is
109 ; faster but implies a promise
111 ;----------------------------------------------------------------------
114 ;----------------------------------------
115 ; For entering and leaving Low ISR, saving and restoring STATUS and W
116 ; See above under <something>_intrl, and {master,slave}_interrupt_low
118 enter_interrupt_low macro
119 mov_ff STATUS, isr_low_save_status
120 mov_wf isr_low_save_w
121 mov_ff STKPTR, isr_low_save_stkptr
124 intrh_fsr0_save macro
125 mov_ff FSR0L, isr_high_save_fsr0
126 mov_ff FSR0H, isr_high_save_fsr0+1
129 intrh_fsr0_restore macro
130 mov_ff isr_high_save_fsr0, FSR0L
131 mov_ff isr_high_save_fsr0+1, FSR0H
134 intrl_handled_core macro ; for internal use only
135 mov_fw isr_low_save_w
136 mov_ff isr_low_save_status, STATUS
140 intrl_handled_nostack macro
141 pop ; undo the `call' from the original ISR
146 goto intrl_handled_routine
149 ;----------------------------------------
150 ; For disabling all interrupts, to make a critical section:
151 ; (for use from main program and Low ISR only)
153 ; GIEH modified appropriately
154 ; everything else preserved
164 ;----------------------------------------
165 ; For the fix specified in the silicon errata:
166 ; silicon revision B4 issue 4
169 ; TABLAT any data from flash
170 ; TBLPTR* correct incremented/decremented
171 ; everything else any preserved
173 tblrd_postinc_fixup macro
178 tblrd_postdec_fixup macro
183 ;----------------------------------------
184 ; For setting up TBLPTR according to the picno
186 load_perpic_tblptr macro flash_map_base, perpic_entry_size
190 ; W, STATUS, PROD* any undefined
191 ; everything else any preserved
193 mov_lw perpic_entry_size
196 mov_lw flash_map_base & 0xff
200 mov_lw flash_map_base >> 8
204 clr_f TBLPTRU ; TBLPTR* -> our point data
207 ;----------------------------------------------------------------------
210 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
211 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
212 ; are equ'd for this.
217 p0_booster_shutdown equ 2b
218 p0_booster_overload equ 1b
219 p0_booster_userfault equ 0b
222 p0_rs232_fcout equ 5c
223 pall_perpicled equ 2d
224 pall_pt0reverse equ 7b
226 p0_booster_dirn equ 0c
227 p0_booster_pwm equ 1c
231 ; LAT* may be subject to read-modify-write, see below
232 ; TRIS* may be subject to read-modify-write, see below
233 ; PORT* may be read, see below
234 ; everything else untouched
236 ; LAT*<bit> TRIS*<bit> PORT*
237 ; pin_z untouched set untouched
238 ; pin_h set cleared untouched
239 ; pin_l cleared cleared untouched
240 ; pin_nz untouched cleared untouched
241 ; pin_vh set untouched untouched
242 ; pin_vl cleared untouched untouched
243 ; pin_ifh untouched untouched read
244 ; pin_ifl untouched untouched read
247 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
251 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
255 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
259 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
272 pin_ifh macro pinspec
273 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
276 pin_ifl macro pinspec
277 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
280 ;----------------------------------------------------------------------