1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
17 include program+clocks.inc
19 ;----------------------------------------------------------------------
20 ; Common conventions for function register notation:
25 ; STATUS Trashed Trashed
26 ; BSR Not used Not used
28 ; TBLPTR*,TABLAT Low ISR Low ISR
29 ; PROD* Low ISR Low ISR
30 ; FSR0 Low ISR Low ISR
31 ; PCLATU Always set to 0 Not used
32 ; PCLATH Low ISR Not used
33 ; FSR1 Low ISR High ISR (detect[1])
34 ; FSR2 Low ISR High ISR (detect[1])
36 ; Trashed May be trashed by any routine anywhere. Saved
37 ; during every ISR entry/exit.
39 ; Low ISR May be used/traashed by any routine run in low-priority
40 ; interrupt, or any routine run during initialisation.
41 ; May therefore not be used in background loop with
42 ; interrupts enabled. May not be used by high-priority
43 ; ISR (unless explicitly saved).
45 ; High ISR May be used/trashed by any routine run in high-priority
46 ; interrupt, or any routine run during initialisation.
47 ; May therefore not be used elsewhere with interrupts
50 ; Only the routines specially noted as intended to
51 ; be called from the High ISR are safe.
54 ; Register is reserved for use by this subsystem, which
55 ; is allowed to expect the value to be preserved.
56 ; Anything else which uses it must save and restore (and
57 ; may also need to disable interrupts, depending on its
60 ; Not High May be used by any routine not running in high-priority
61 ; interrupt. Not saved by high-priority interrupt
62 ; entry/exit, so any high-priority interrupt routine which
63 ; uses this register must save and restore it.
65 ; A routine which is allowed to trash a register may document that it
66 ; saves that register for the benefit of its callers.
68 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
69 ; I2C response and detection code (detect.asm), after det_slave_init.
71 ; General-purpose hardware allocation:
74 ; Timer 0 nmra Disabled
76 ; Timer 1 (1ms tick, int. low) (1ms tick, int. low)
77 ; CCP1 (1ms tick, int. low) (1ms tick, int. low)
78 ; Timer 3 point fire timer point fire timer
81 ; (...) indicates that this is a projected use, NYI
83 ;----------------------------------------------------------------------
84 ; Conventional routine names:
86 ; <periph>_local_do Process a master-to-slave command to activate
87 ; a local peripheral (also called on master to
88 ; activate its own local peripherals)
90 ; <periph>_local_init Initialises RAM tables for local peripheral
91 ; and arranges for pins to be set in appropriate
92 ; quiescent state. Configures pic built-in
95 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
97 ; command_<periph> Called when an appropriate message has been
98 ; received from the host.
100 ; <something>_intrl Low ISR service routine.
101 ; Checks for any relevant interrupt.
102 ; If not, just returns.
103 ; If found, services it and then does either
104 ; intrl_handled or intrl_handled_nostack
105 ; neither of which return; the latter is
106 ; faster but implies a promise
108 ;----------------------------------------------------------------------
111 ;----------------------------------------
112 ; For entering and leaving Low ISR, saving and restoring STATUS and W
113 ; See above under <something>_intrl, and {master,slave}_interrupt_low
115 enter_interrupt_low macro
116 mov_ff STATUS, isr_low_save_status
117 mov_wf isr_low_save_w
118 mov_ff STKPTR, isr_low_save_stkptr
121 intrl_handled_core macro ; for internal use only
122 mov_fw isr_low_save_w
123 mov_ff isr_low_save_status, STATUS
127 intrl_handled_nostack macro
128 pop ; undo the `call' from the original ISR
133 goto intrl_handled_routine
136 ;----------------------------------------
137 ; For disabling all interrupts, to make a critical section:
138 ; (for use from main program and Low ISR only)
140 ; GIEH modified appropriately
141 ; everything else preserved
147 unmask_int_high macro
151 ;----------------------------------------
152 ; For the fix specified in the silicon errata:
153 ; silicon revision B4 issue 4
156 ; TABLAT any data from flash
157 ; TBLPTR* correct incremented/decremented
158 ; everything else any preserved
160 tblrd_postinc_fixup macro
165 tblrd_postdec_fixup macro
170 ;----------------------------------------
171 ; For setting up TBLPTR according to the picno
173 load_perpic_tblptr macro flash_map_base, perpic_entry_size
177 ; W, STATUS, PROD* any undefined
178 ; everything else any preserved
180 mov_lw perpic_entry_size
183 mov_lw flash_map_base & 0xff
187 mov_lw flash_map_base >> 8
191 clr_f TBLPTRU ; TBLPTR* -> our point data
194 ;----------------------------------------------------------------------
197 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
198 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
199 ; are equ'd for this.
204 p0_booster_shutdown equ 2b
205 p0_booster_overload equ 1b
206 p0_booster_userfault equ 0b
209 p0_rs232_fcout equ 5c
210 pall_perpicled equ 2d
211 pall_pt0reverse equ 7b
213 p0_booster_dirn equ 0c
214 p0_booster_pwm equ 1c
218 ; LAT* may be subject to read-modify-write, see below
219 ; TRIS* may be subject to read-modify-write, see below
220 ; PORT* may be read, see below
221 ; everything else untouched
223 ; LAT*<bit> TRIS*<bit> PORT*
224 ; pin_z untouched set untouched
225 ; pin_h set cleared untouched
226 ; pin_l cleared cleared untouched
227 ; pin_nz untouched cleared untouched
228 ; pin_vh set untouched untouched
229 ; pin_vl cleared untouched untouched
230 ; pin_ifh untouched untouched read
231 ; pin_ifl untouched untouched read
234 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
238 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
242 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
246 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
259 pin_ifh macro pinspec
260 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
263 pin_ifl macro pinspec
264 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
267 ;----------------------------------------------------------------------