1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
13 include ../iwjpictest/clockvaries.inc
14 include variables+vars.inc
16 include program+clocks.inc
20 tickdiv_us equ tick_us * tickdiv
22 ;----------------------------------------------------------------------
23 ; Common conventions for function register notation:
28 ; STATUS Trashed Trashed
29 ; BSR Not used Not used
30 ; t,u,v Low ISR Low ISR
31 ; TBLPTR*,TABLAT Low ISR Low ISR
32 ; PROD* Low ISR Low ISR
33 ; FSR0 Low ISR Low ISR
34 ; PCLATU Always set to 0 Not used
35 ; PCLATH Low ISR Not used
36 ; t_dolocal Low ISR High ISR
37 ; FSR1 Low ISR High ISR (detect[1])
38 ; FSR2 High ISR (nmra) High ISR (detect[1])
40 ; Trashed May be trashed by any routine anywhere. Saved
41 ; during every ISR entry/exit.
43 ; Low ISR May be used/trashed by any routine run in low-priority
44 ; interrupt, or any routine run during initialisation.
45 ; May therefore not be used in background loop with
46 ; interrupts enabled. May not be used by high-priority
47 ; ISR (unless explicitly saved, eg isrh_fsr0_{save,restore}).
49 ; High ISR May be used/trashed by any routine run in high-priority
50 ; interrupt, or any routine run during initialisation.
51 ; May therefore not be used elsewhere with interrupts
54 ; Only the routines specially noted as intended to
55 ; be called from the High ISR are safe.
58 ; Register is reserved for use by this subsystem, which
59 ; is allowed to expect the value to be preserved.
60 ; Anything else which uses it must save and restore (and
61 ; may also need to disable interrupts, depending on its
64 ; Not High May be used by any routine not running in high-priority
65 ; interrupt. Not saved by high-priority interrupt
66 ; entry/exit, so any high-priority interrupt routine which
67 ; uses this register must save and restore it.
69 ; A routine which is allowed to trash a register may document that it
70 ; saves that register for the benefit of its callers.
72 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
73 ; I2C response and detection code (detect.asm), after
74 ; detect_slave_init. Likewise FSR2 is reserved exclusively
75 ; for the NMRA output ISR after nmra_init.
77 ; General-purpose hardware allocation:
80 ; Timer 0 nmra Disabled
81 ; Timer 2 tick, int. low -
84 ; Timer 3 point fire timer point fire timer
87 ; (...) indicates that this is a projected use, NYI
89 ;----------------------------------------------------------------------
90 ; Conventional routine names:
92 ; <periph>_local_do Process a master-to-slave command to activate
93 ; a local peripheral, in High ISR. Also called
94 ; on master in Low ISR to activate its own
95 ; local peripherals. NB strange calling convention!
97 ; <periph>_local_init Initialises RAM tables for local peripheral
98 ; and arranges for pins to be set in appropriate
99 ; quiescent state. Configures pic built-in
102 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
104 ; command_<periph> Called when an appropriate message has been
105 ; received from the host.
107 ; <something>_intrl Low ISR service routine.
108 ; Checks for any relevant interrupt.
109 ; If not, just returns.
110 ; If found, services it and then does either
111 ; intrl_handled or intrl_handled_nostack
112 ; neither of which return; the latter is
113 ; faster but implies a promise
115 ;----------------------------------------------------------------------
118 ;----------------------------------------
119 ; For entering and leaving Low ISR, saving and restoring STATUS and W
120 ; See above under <something>_intrl, and {master,slave}_interrupt_low
122 enter_interrupt_low macro
123 mov_ff STATUS, isr_low_save_status
124 mov_wf isr_low_save_w
125 mov_ff STKPTR, isr_low_save_stkptr
128 intrh_fsr0_save macro
129 mov_ff FSR0L, isr_high_save_fsr0
130 mov_ff FSR0H, isr_high_save_fsr0+1
133 intrh_fsr0_restore macro
134 mov_ff isr_high_save_fsr0, FSR0L
135 mov_ff isr_high_save_fsr0+1, FSR0H
138 intrl_handled_core macro ; for internal use only
139 mov_fw isr_low_save_w
140 mov_ff isr_low_save_status, STATUS
144 intrl_handled_nostack macro
145 pop ; undo the `call' from the original ISR
150 goto intrl_handled_routine
153 ;----------------------------------------
154 ; For disabling all interrupts, to make a critical section:
155 ; (for use from main program and Low ISR only)
157 ; GIEH modified appropriately
158 ; everything else preserved
168 ;----------------------------------------
169 ; For the fix specified in the silicon errata:
170 ; silicon revision B4 issue 4
173 ; TABLAT any data from flash
174 ; TBLPTR* correct incremented/decremented
175 ; everything else any preserved
177 tblrd_postinc_fixup macro
182 tblrd_postdec_fixup macro
187 ;----------------------------------------
188 ; For setting up TBLPTR
190 load_tblptr macro value
194 ; W, STATUS any undefined
210 load_perpic_tblptr macro flash_map_base, perpic_entry_size
214 ; W, STATUS, PROD* any undefined
215 ; everything else any preserved
217 mov_lw perpic_entry_size
220 mov_lw flash_map_base & 0xff
224 mov_lw flash_map_base >> 8
228 clr_f TBLPTRU ; TBLPTR* -> our point data
231 ;----------------------------------------------------------------------
234 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
235 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
236 ; are equ'd for this.
241 p0_booster_shutdown equ 2b
242 p0_booster_overload equ 1b
243 p0_booster_userfault equ 0b
246 p0_rs232_fcout equ 5c
247 pall_perpicled equ 2d
248 pall_pt0reverse equ 7b
250 p0_booster_dirn equ 0c
251 p0_booster_pwm equ 1c
255 ; LAT* may be subject to read-modify-write, see below
256 ; TRIS* may be subject to read-modify-write, see below
257 ; PORT* may be read, see below
258 ; everything else untouched
260 ; LAT*<bit> TRIS*<bit> PORT*
261 ; pin_z untouched set untouched
262 ; pin_h set cleared untouched
263 ; pin_l cleared cleared untouched
264 ; pin_nz untouched cleared untouched
265 ; pin_vh set untouched untouched
266 ; pin_vl cleared untouched untouched
267 ; pin_ifh untouched untouched read
268 ; pin_ifl untouched untouched read
271 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
275 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
279 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
283 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
296 pin_ifh macro pinspec
297 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
300 pin_ifl macro pinspec
301 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
304 pinlat_ifh macro pinspec
305 bt_f_if1 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
308 pinlat_ifl macro pinspec
309 bt_f_if0 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
312 ;----------------------------------------------------------------------