1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
17 ;----------------------------------------------------------------------
18 ; Common conventions for function register notation:
23 ; STATUS Trashed Trashed
24 ; BSR Not used Not used
26 ; TBLPTR*,TABLAT Low ISR Low ISR
27 ; FSR0 Low ISR Low ISR
28 ; FSR1 Low ISR High ISR (detect)
29 ; FSR2 Low ISR High ISR (detect)
31 ; Trashed May be trashed by any routine anywhere. Saved
32 ; during every ISR entry/exit.
34 ; Low ISR May be used/traashed by any routine run in low-priority
35 ; interrupt, or any routine run during initialisation.
36 ; May therefore not be used in background loop with
37 ; interrupts enabled. May not be used by high-priority
38 ; ISR (unless explicitly saved).
40 ; High ISR May be used/trashed by any routine run in high-priority
41 ; interrupt, or any routine run during initialisation.
42 ; May therefore not be used elsewhere with interrupts
45 ; Only the routines specially noted as intended to
46 ; be called from the High ISR are safe.
49 ; Register is reserved for use by this subsystem, which
50 ; is allowed to expect the value to be preserved.
51 ; Anything else which uses it must save and restore (and
52 ; may also need to disable interrupts, depending on its
55 ; Not High May be used by any routine not running in high-priority
56 ; interrupt. Not saved by high-priority interrupt
57 ; entry/exit, so any high-priority interrupt routine which
58 ; uses this register must save and restore it.
60 ; A routine which is allowed to trash a register may document that it
61 ; saves that register for the benefit of its callers.
63 ; General-purpose hardware allocation:
66 ; Timer 0 nmra Disabled
68 ; Timer 1 1ms tick, int. low 1ms tick, int. low
69 ; CCP1 1ms tick, int. low 1ms tick, int. low
70 ; Timer 3 point fire timer point fire timer
73 ;----------------------------------------------------------------------
76 ;----------------------------------------------------------------------
79 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
80 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
86 p0_booster_shutdown equ 2b
87 p0_booster_overload equ 1b
88 p0_booster_userfault equ 0b
93 pall_pt0reverse equ 7b
95 p0_booster_dirn equ 0c
100 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
104 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
108 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
112 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
125 pin_ifh macro pinspec
126 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
129 pin_ifl macro pinspec
130 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
133 ;----------------------------------------------------------------------