1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
17 include program+clocks.inc
19 ;----------------------------------------------------------------------
20 ; Common conventions for function register notation:
25 ; STATUS Trashed Trashed
26 ; BSR Not used Not used
28 ; TBLPTR*,TABLAT Low ISR Low ISR
29 ; PROD* Low ISR Low ISR
30 ; FSR0 Low ISR Low ISR
31 ; FSR1 Low ISR High ISR (detect[1])
32 ; FSR2 Low ISR High ISR (detect[1])
34 ; Trashed May be trashed by any routine anywhere. Saved
35 ; during every ISR entry/exit.
37 ; Low ISR May be used/traashed by any routine run in low-priority
38 ; interrupt, or any routine run during initialisation.
39 ; May therefore not be used in background loop with
40 ; interrupts enabled. May not be used by high-priority
41 ; ISR (unless explicitly saved).
43 ; High ISR May be used/trashed by any routine run in high-priority
44 ; interrupt, or any routine run during initialisation.
45 ; May therefore not be used elsewhere with interrupts
48 ; Only the routines specially noted as intended to
49 ; be called from the High ISR are safe.
52 ; Register is reserved for use by this subsystem, which
53 ; is allowed to expect the value to be preserved.
54 ; Anything else which uses it must save and restore (and
55 ; may also need to disable interrupts, depending on its
58 ; Not High May be used by any routine not running in high-priority
59 ; interrupt. Not saved by high-priority interrupt
60 ; entry/exit, so any high-priority interrupt routine which
61 ; uses this register must save and restore it.
63 ; A routine which is allowed to trash a register may document that it
64 ; saves that register for the benefit of its callers.
66 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
67 ; I2C response and detection code (detect.asm), after det_slave_init.
69 ; General-purpose hardware allocation:
72 ; Timer 0 nmra Disabled
74 ; Timer 1 (1ms tick, int. low) (1ms tick, int. low)
75 ; CCP1 (1ms tick, int. low) (1ms tick, int. low)
76 ; Timer 3 point fire timer point fire timer
79 ; (...) indicates that this is a projected use, NYI
81 ;----------------------------------------------------------------------
82 ; Conventional routine names:
84 ; <periph>_local_do Process a master-to-slave command to activate
85 ; a local peripheral (also called on master to
86 ; activate its own local peripherals)
88 ; <periph>_local_init Initialises RAM tables for local peripheral
89 ; and arranges for pins to be set in appropriate
90 ; quiescent state. Configures pic built-in
93 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
95 ; <periph>_master_do Called when an appropriate message has been
96 ; received from the host.
98 ; <something>_intrl Low ISR service routine.
99 ; Checks for any relevant interrupt.
100 ; If not, just returns.
101 ; If found, services it and then does either
102 ; intrl_handled or intrl_handled_nostack
103 ; neither of which return; the latter is
104 ; faster but implies a promise
106 ;----------------------------------------------------------------------
109 ;----------------------------------------
110 ; For entering and leaving Low ISR, saving and restoring STATUS and W
111 ; See above under <something>_intrl, and {master,slave}_interrupt_low
113 enter_interrupt_low macro
114 mov_ff STATUS, isr_low_save_status
115 mov_wf isr_low_save_w
116 mov_ff STKPTR, isr_low_save_stkptr
119 intrl_handled_core macro ; for internal use only
120 mov_fw isr_low_save_w
121 mov_ff isr_low_save_status, STATUS
125 intrl_handled_nostack macro
126 pop ; undo the `call' from the original ISR
131 goto intrl_handled_routine
134 ;----------------------------------------
135 ; For disabling all interrupts, to make a critical section:
136 ; (for use from main program and Low ISR only)
138 ; GIEH modified appropriately
139 ; everything else preserved
145 unmask_int_high macro
149 ;----------------------------------------
150 ; For the fix specified in the silicon errata:
151 ; silicon revision B4 issue 4
154 ; TABLAT any data from flash
155 ; TBLPTR* correct incremented/decremented
156 ; everything else any preserved
158 tblrd_postinc_fixup macro
163 tblrd_postdec_fixup macro
168 ;----------------------------------------
169 ; For setting up TBLPTR according to the picno
171 load_perpic_tblptr macro flash_map_base, perpic_entry_size
175 ; W, STATUS, PROD* any undefined
176 ; everything else any preserved
178 mov_lw perpic_entry_size
181 mov_lw flash_map_base & 0xff
185 mov_lw flash_map_base >> 8
189 clr_f TBLPTRU ; TBLPTR* -> our point data
192 ;----------------------------------------------------------------------
195 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
196 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
197 ; are equ'd for this.
202 p0_booster_shutdown equ 2b
203 p0_booster_overload equ 1b
204 p0_booster_userfault equ 0b
207 p0_rs232_fcout equ 5c
208 pall_perpicled equ 2d
209 pall_pt0reverse equ 7b
211 p0_booster_dirn equ 0c
212 p0_booster_pwm equ 1c
216 ; LAT* may be subject to read-modify-write, see below
217 ; TRIS* may be subject to read-modify-write, see below
218 ; PORT* may be read, see below
219 ; everything else untouched
221 ; LAT*<bit> TRIS*<bit> PORT*
222 ; pin_z untouched set untouched
223 ; pin_h set cleared untouched
224 ; pin_l cleared cleared untouched
225 ; pin_nz untouched cleared untouched
226 ; pin_vh set untouched untouched
227 ; pin_vl cleared untouched untouched
228 ; pin_ifh untouched untouched read
229 ; pin_ifl untouched untouched read
232 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
236 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
240 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
244 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
257 pin_ifh macro pinspec
258 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
261 pin_ifl macro pinspec
262 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
265 ;----------------------------------------------------------------------