1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
18 ;----------------------------------------------------------------------
19 ; Common conventions for function register notation:
24 ; STATUS Trashed Trashed
25 ; BSR Not used Not used
27 ; TBLPTR*,TABLAT Low ISR Low ISR
28 ; PROD* Low ISR Low ISR
29 ; FSR0 Low ISR Low ISR
30 ; FSR1 Low ISR High ISR (detect[1])
31 ; FSR2 Low ISR High ISR (detect[1])
33 ; Trashed May be trashed by any routine anywhere. Saved
34 ; during every ISR entry/exit.
36 ; Low ISR May be used/traashed by any routine run in low-priority
37 ; interrupt, or any routine run during initialisation.
38 ; May therefore not be used in background loop with
39 ; interrupts enabled. May not be used by high-priority
40 ; ISR (unless explicitly saved).
42 ; High ISR May be used/trashed by any routine run in high-priority
43 ; interrupt, or any routine run during initialisation.
44 ; May therefore not be used elsewhere with interrupts
47 ; Only the routines specially noted as intended to
48 ; be called from the High ISR are safe.
51 ; Register is reserved for use by this subsystem, which
52 ; is allowed to expect the value to be preserved.
53 ; Anything else which uses it must save and restore (and
54 ; may also need to disable interrupts, depending on its
57 ; Not High May be used by any routine not running in high-priority
58 ; interrupt. Not saved by high-priority interrupt
59 ; entry/exit, so any high-priority interrupt routine which
60 ; uses this register must save and restore it.
62 ; A routine which is allowed to trash a register may document that it
63 ; saves that register for the benefit of its callers.
65 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
66 ; I2C response and detection code (detect.asm), after det_slave_init.
68 ; General-purpose hardware allocation:
71 ; Timer 0 nmra Disabled
73 ; Timer 1 (1ms tick, int. low) (1ms tick, int. low)
74 ; CCP1 (1ms tick, int. low) (1ms tick, int. low)
75 ; Timer 3 point fire timer point fire timer
78 ; (...) indicates that this is a projected use, NYI
80 ;----------------------------------------------------------------------
81 ; Conventional routine names:
83 ; <periph>_local_do Process a master-to-slave command to activate
84 ; a local peripheral (also called on master to
85 ; activate its own local peripherals)
87 ; <periph>_local_init Initialises RAM tables for local peripheral
88 ; and arranges for pins to be set in appropriate
89 ; quiescent state. Configures pic built-in
92 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
94 ; <periph>_master_do Called when an appropriate message has been
95 ; received from the host.
97 ; <something>_intrl Low ISR service routine.
98 ; Checks for any relevant interrupt.
99 ; If not, just returns.
100 ; If found, services it and then does either
101 ; intrl_handled or intrl_handled_nostack
102 ; neither of which return; the latter is
103 ; faster but implies a promise
105 ;----------------------------------------------------------------------
108 ;----------------------------------------
109 ; For entering and leaving Low ISR, saving and restoring STATUS and W
110 ; See above under <something>_intrl, and {master,slave}_interrupt_low
112 enter_interrupt_low macro
113 mov_ff STATUS, isr_low_save_status
114 mov_wf isr_low_save_w
115 mov_ff STKPTR, isr_low_save_stkptr
118 intrl_handled_core macro ; for internal use only
119 mov_fw isr_low_save_w
120 mov_ff isr_low_save_status, STATUS
124 intrl_handled_nostack macro
125 pop ; undo the `call' from the original ISR
130 goto intrl_handled_routine
133 ;----------------------------------------
134 ; For disabling all interrupts, to make a critical section:
135 ; (for use from main program and Low ISR only)
137 ; GIEH modified appropriately
138 ; everything else preserved
144 unmask_int_high macro
148 ;----------------------------------------
149 ; For the fix specified in the silicon errata:
150 ; silicon revision B4 issue 4
153 ; TABLAT any data from flash
154 ; TBLPTR* correct incremented/decremented
155 ; everything else any preserved
157 tblrd_postinc_fixup macro
162 tblrd_postdec_fixup macro
167 ;----------------------------------------
168 ; For setting up TBLPTR according to the picno
170 load_perpic_tblptr macro flash_map_base, perpic_entry_size
174 ; W, STATUS, PROD* any undefined
175 ; everything else any preserved
177 mov_lw perpic_entry_size
180 mov_lw flash_map_base & 0xff
184 mov_lw flash_map_base >> 8
188 clr_f TBLPTRU ; TBLPTR* -> our point data
191 ;----------------------------------------------------------------------
194 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
195 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
196 ; are equ'd for this.
201 p0_booster_shutdown equ 2b
202 p0_booster_overload equ 1b
203 p0_booster_userfault equ 0b
206 p0_rs232_fcout equ 5c
207 pall_perpicled equ 2d
208 pall_pt0reverse equ 7b
210 p0_booster_dirn equ 0c
211 p0_booster_pwm equ 1c
215 ; LAT* may be subject to read-modify-write, see below
216 ; TRIS* may be subject to read-modify-write, see below
217 ; PORT* may be read, see below
218 ; everything else untouched
220 ; LAT*<bit> TRIS*<bit> PORT*
221 ; pin_z untouched set untouched
222 ; pin_h set cleared untouched
223 ; pin_l cleared cleared untouched
224 ; pin_nz untouched cleared untouched
225 ; pin_vh set untouched untouched
226 ; pin_vl cleared untouched untouched
227 ; pin_ifh untouched untouched read
228 ; pin_ifl untouched untouched read
231 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
235 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
239 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
243 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
256 pin_ifh macro pinspec
257 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
260 pin_ifl macro pinspec
261 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
264 ;----------------------------------------------------------------------