1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
8 include /usr/share/gputils/header/p18f458.inc
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
14 include ../iwjpictest/clockvaries.inc
15 include variables+vars.inc
17 include program+clocks.inc
20 ;----------------------------------------------------------------------
21 ; Common conventions for function register notation:
26 ; STATUS Trashed Trashed
27 ; BSR Not used Not used
29 ; TBLPTR*,TABLAT Low ISR Low ISR
30 ; PROD* Low ISR Low ISR
31 ; FSR0 Low ISR Low ISR
32 ; PCLATU Always set to 0 Not used
33 ; PCLATH Low ISR Not used
34 ; t_dolocal Low ISR High ISR
35 ; FSR1 Low ISR High ISR (detect[1])
36 ; FSR2 High ISR (nmra) High ISR (detect[1])
38 ; Trashed May be trashed by any routine anywhere. Saved
39 ; during every ISR entry/exit.
41 ; Low ISR May be used/traashed by any routine run in low-priority
42 ; interrupt, or any routine run during initialisation.
43 ; May therefore not be used in background loop with
44 ; interrupts enabled. May not be used by high-priority
45 ; ISR (unless explicitly saved, eg isrh_fsr0_{save,restore}).
47 ; High ISR May be used/trashed by any routine run in high-priority
48 ; interrupt, or any routine run during initialisation.
49 ; May therefore not be used elsewhere with interrupts
52 ; Only the routines specially noted as intended to
53 ; be called from the High ISR are safe.
56 ; Register is reserved for use by this subsystem, which
57 ; is allowed to expect the value to be preserved.
58 ; Anything else which uses it must save and restore (and
59 ; may also need to disable interrupts, depending on its
62 ; Not High May be used by any routine not running in high-priority
63 ; interrupt. Not saved by high-priority interrupt
64 ; entry/exit, so any high-priority interrupt routine which
65 ; uses this register must save and restore it.
67 ; A routine which is allowed to trash a register may document that it
68 ; saves that register for the benefit of its callers.
70 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
71 ; I2C response and detection code (detect.asm), after
72 ; detect_slave_init. Likewise FSR2 is reserved exclusively
73 ; for the NMRA output ISR after nmra_init.
75 ; General-purpose hardware allocation:
78 ; Timer 0 nmra Disabled
79 ; Timer 2 tick: 10ms, int. low -
82 ; Timer 3 point fire timer point fire timer
85 ; (...) indicates that this is a projected use, NYI
87 ;----------------------------------------------------------------------
88 ; Conventional routine names:
90 ; <periph>_local_do Process a master-to-slave command to activate
91 ; a local peripheral, in High ISR. Also called
92 ; on master in Low ISR to activate its own
93 ; local peripherals. NB strange calling convention!
95 ; <periph>_local_init Initialises RAM tables for local peripheral
96 ; and arranges for pins to be set in appropriate
97 ; quiescent state. Configures pic built-in
100 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
102 ; command_<periph> Called when an appropriate message has been
103 ; received from the host.
105 ; <something>_intrl Low ISR service routine.
106 ; Checks for any relevant interrupt.
107 ; If not, just returns.
108 ; If found, services it and then does either
109 ; intrl_handled or intrl_handled_nostack
110 ; neither of which return; the latter is
111 ; faster but implies a promise
113 ;----------------------------------------------------------------------
116 ;----------------------------------------
117 ; For entering and leaving Low ISR, saving and restoring STATUS and W
118 ; See above under <something>_intrl, and {master,slave}_interrupt_low
120 enter_interrupt_low macro
121 mov_ff STATUS, isr_low_save_status
122 mov_wf isr_low_save_w
123 mov_ff STKPTR, isr_low_save_stkptr
126 intrh_fsr0_save macro
127 mov_ff FSR0L, isr_high_save_fsr0
128 mov_ff FSR0H, isr_high_save_fsr0+1
131 intrh_fsr0_restore macro
132 mov_ff isr_high_save_fsr0, FSR0L
133 mov_ff isr_high_save_fsr0+1, FSR0H
136 intrl_handled_core macro ; for internal use only
137 mov_fw isr_low_save_w
138 mov_ff isr_low_save_status, STATUS
142 intrl_handled_nostack macro
143 pop ; undo the `call' from the original ISR
148 goto intrl_handled_routine
151 ;----------------------------------------
152 ; For disabling all interrupts, to make a critical section:
153 ; (for use from main program and Low ISR only)
155 ; GIEH modified appropriately
156 ; everything else preserved
166 ;----------------------------------------
167 ; For the fix specified in the silicon errata:
168 ; silicon revision B4 issue 4
171 ; TABLAT any data from flash
172 ; TBLPTR* correct incremented/decremented
173 ; everything else any preserved
175 tblrd_postinc_fixup macro
180 tblrd_postdec_fixup macro
185 ;----------------------------------------
186 ; For setting up TBLPTR according to the picno
188 load_perpic_tblptr macro flash_map_base, perpic_entry_size
192 ; W, STATUS, PROD* any undefined
193 ; everything else any preserved
195 mov_lw perpic_entry_size
198 mov_lw flash_map_base & 0xff
202 mov_lw flash_map_base >> 8
206 clr_f TBLPTRU ; TBLPTR* -> our point data
209 ;----------------------------------------------------------------------
212 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
213 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
214 ; are equ'd for this.
219 p0_booster_shutdown equ 2b
220 p0_booster_overload equ 1b
221 p0_booster_userfault equ 0b
224 p0_rs232_fcout equ 5c
225 pall_perpicled equ 2d
226 pall_pt0reverse equ 7b
228 p0_booster_dirn equ 0c
229 p0_booster_pwm equ 1c
233 ; LAT* may be subject to read-modify-write, see below
234 ; TRIS* may be subject to read-modify-write, see below
235 ; PORT* may be read, see below
236 ; everything else untouched
238 ; LAT*<bit> TRIS*<bit> PORT*
239 ; pin_z untouched set untouched
240 ; pin_h set cleared untouched
241 ; pin_l cleared cleared untouched
242 ; pin_nz untouched cleared untouched
243 ; pin_vh set untouched untouched
244 ; pin_vl cleared untouched untouched
245 ; pin_ifh untouched untouched read
246 ; pin_ifl untouched untouched read
249 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
253 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
257 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
261 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
274 pin_ifh macro pinspec
275 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
278 pin_ifl macro pinspec
279 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
282 ;----------------------------------------------------------------------