1 ;======================================================================
3 ; common macros & equs etc.
4 ; generally include this at the top of each file.
6 ;----------------------------------------------------------------------
7 ; COMMON INCLUDES and BOILERPLATE
11 include morse+auto.inc
12 include ../iwjpictest/insn-aliases.inc
13 include ../iwjpictest/clockvaries.inc
14 include variables+vars.inc
16 include program+clocks.inc
20 tickdiv_us equ tick_us * tickdiv
22 ;----------------------------------------------------------------------
23 ; Common conventions for function register notation:
28 ; STATUS Trashed Trashed
29 ; BSR Not used Not used
30 ; t,u,v Low ISR Low ISR
31 ; TBLPTR*,TABLAT Low ISR Low ISR
32 ; PROD* Low ISR Low ISR
33 ; FSR0 Low ISR Low ISR
34 ; PCLATU Always set to 0 Not used
35 ; PCLATH Low ISR Not used
36 ; t_dolocal Low ISR High ISR
37 ; FSR1 Low ISR High ISR (detect[1])
38 ; FSR2 High ISR (nmra[1]) High ISR (detect[1])
39 ; PORTB Special read handling[2] Used normally
41 ; Main loop detection scan detection scan
42 ; High ISR NMRA output I2C service
43 ; Low ISRs everything else everything else
45 ; Trashed May be trashed by any routine anywhere. Saved
46 ; during every ISR entry/exit.
48 ; Low ISR May be used/trashed by any routine run in low-priority
49 ; interrupt, or any routine run during initialisation.
50 ; May therefore not be used in background loop with
51 ; interrupts enabled. May not be used by high-priority
52 ; ISR (unless explicitly saved, eg intrlh_fsr0_{save,restore}).
54 ; High ISR May be used/trashed by any routine run in high-priority
55 ; interrupt, or any routine run during initialisation.
56 ; May therefore not be used elsewhere with interrupts
59 ; Only the routines specially noted as intended to
60 ; be called from the High ISR are safe.
63 ; Register is reserved for use by this subsystem, which
64 ; is allowed to expect the value to be preserved.
65 ; Anything else which uses it must save and restore (and
66 ; may also need to disable interrupts, depending on its
69 ; Not High May be used by any routine not running in high-priority
70 ; interrupt. Not saved by high-priority interrupt
71 ; entry/exit, so any high-priority interrupt routine which
72 ; uses this register must save and restore it.
74 ; A routine which is allowed to trash a register may document that it
75 ; saves that register for the benefit of its callers.
77 ; [1] FSR1 and FSR2 on slave pics are reserved exclusively for the
78 ; I2C response and detection code (detect.asm), after
79 ; detect_slave_init. Likewise FSR2 is reserved exclusively
80 ; for the NMRA output ISR after nmra_init.
82 ; [2] On the master PIC we the interrupt-on-change feature of PORTB.
83 ; This means that routines mustn't casually read PORTB. Instead,
84 ; they should call portb_read from serout.asm.
86 ; General-purpose hardware allocation:
89 ; Timer 0 nmra Disabled
90 ; Timer 2 tick, int. low -
93 ; Timer 3 point fire timer point fire timer
96 ; (...) indicates that this is a projected use, NYI
98 ;----------------------------------------------------------------------
99 ; Conventional routine names:
101 ; <periph>_local_do Process a master-to-slave command to activate
102 ; a local peripheral, in High ISR. Also called
103 ; on master in Low ISR to activate its own
104 ; local peripherals. NB strange calling convention!
106 ; <periph>_local_init Initialises RAM tables for local peripheral
107 ; and arranges for pins to be set in appropriate
108 ; quiescent state. Configures pic built-in
111 ; <periph>_local_intrl Low ISR service routine for peripheral (see below).
113 ; command_<periph> Called when an appropriate message has been
114 ; received from the host.
116 ; <something>_intrl Low ISR service routine.
117 ; Checks for any relevant interrupt.
118 ; If not, just returns
119 ; If found, services it and then does either
120 ; intrl_handled or intrl_handled_nostack
121 ; neither of which return; the latter is
122 ; faster but implies a promise
124 ;----------------------------------------------------------------------
130 ;----------------------------------------
131 ; For adding a byte to the debug buffer.
132 ; Not for use in High ISR. In all cases:
135 ; all others any preserved
139 Dv macro ; sorry, but assembler's dw directive isn't case-sensitive
141 ; W message byte preserved
147 Dl macro debug_literal_value
149 ; W any literal value as specified
151 mov_lw debug_literal_value
156 Df macro debug_register_file_address
158 ; W any value from specified memory location
160 mov_fw debug_register_file_address
174 Dl macro debug_literal_value
176 Df macro debug_register_file_address
182 ;----------------------------------------
183 ; For entering and leaving Low ISR, saving and restoring STATUS and W
184 ; See above under <something>_intrl, and {master,slave}_interrupt_low
186 enter_interrupt_low macro
187 mov_ff STATUS, isr_low_save_status
188 mov_wf isr_low_save_w
189 mov_ff STKPTR, isr_low_save_stkptr
192 intrlh_fsr0_save macro ; Low ISR on master, High ISR on slave
193 mov_ff FSR0L, isr_lh_save_fsr0
194 mov_ff FSR0H, isr_lh_save_fsr0+1
197 intrlh_fsr0_restore macro
198 mov_ff isr_lh_save_fsr0, FSR0L
199 mov_ff isr_lh_save_fsr0+1, FSR0H
202 intrl_handled_core macro ; for internal use only
203 mov_fw isr_low_save_w
204 mov_ff isr_low_save_status, STATUS
208 intrl_handled_nostack macro
209 pop ; undo the `call' from the original ISR
214 goto intrl_handled_routine
217 ;----------------------------------------
218 ; For disabling all interrupts, to make a critical section:
219 ; (for use from main program and Low ISR only)
221 ; GIEH modified appropriately
222 ; everything else preserved
232 ;----------------------------------------
233 ; For the fix specified in the silicon errata:
234 ; silicon revision B4 issue 4
237 ; TABLAT any data from flash
238 ; TBLPTR* correct incremented/decremented
239 ; everything else any preserved
241 tblrd_postinc_fixup macro
246 tblrd_postdec_fixup macro
251 ;----------------------------------------
252 ; For setting up TBLPTR
254 load_tblptr macro value
258 ; W, STATUS any undefined
274 load_perpic_tblptr macro flash_map_base, perpic_entry_size
278 ; W, STATUS, PROD* any undefined
279 ; everything else any preserved
281 mov_lw perpic_entry_size
284 mov_lw flash_map_base & 0xff
288 mov_lw flash_map_base >> 8
292 clr_f TBLPTRU ; TBLPTR* -> our point data
295 ;----------------------------------------
296 ; invocation macro for outpins_local_init_part{1,2}, see misc.asm
297 outputs_local_init macro picno2thingmap, maxthings, thingix2latbit, bkthingix2portnumbitnum
299 load_perpic_tblptr picno2thingmap, maxthings/8
300 mov_lfsr thingix2latbit-1, 0
303 call outpins_local_init_part1
305 mov_lw bkthingix2portnumbitnum >> 8
306 mov_wf TBLPTRH ; TBLPTR* -> point port/bit data
307 mov_lw bkthingix2portnumbitnum & 0xff
310 mov_lfsr thingix2latbit-1, 0 ; FSR0 -> last bit (and previous LAT*)
313 call outpins_local_init_part2
317 ;----------------------------------------------------------------------
320 ; A PINSPEC is a constant 0x<bit><port> where <port> is a b c d e
321 ; and <port> is 0 1 2 3 4 5 6 7. Generally p<picno>_<subsystem>_<pin>
322 ; are equ'd for this.
327 p0_booster_shutdown equ 2b
328 p0_booster_overload equ 1b
329 p0_booster_userfault_ equ 0b
332 p0_rs232_fcout equ 5c
333 pall_perpicled equ 2d
334 pall_pt0reverse equ 7b
336 p0_booster_dirn equ 0c
337 p0_booster_pwm equ 1c
341 ; LAT* may be subject to read-modify-write, see below
342 ; TRIS* may be subject to read-modify-write, see below
343 ; PORT* may be read, see below
344 ; everything else untouched
346 ; LAT*<bit> TRIS*<bit> PORT* W
348 ; pin_h set cleared - -
349 ; pin_l cleared cleared - -
350 ; pin_nz - cleared - -
352 ; pin_vl cleared - - -
353 ; pin_vhl toggled - - -
356 ; pinlat_ifh read - - -
357 ; pinlat_ifl read - - -
358 ; pin_inw_ifh - - - read
359 ; pin_inw_ifl - - - read
362 bs_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
366 bc_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
369 pin_znz macro pinspec
370 btg_f TRISA + (TRISB-TRISA)*((pinspec-0xa) & 15), pinspec >> 4
374 bs_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
378 bc_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
381 pin_vhl macro pinspec
382 btg_f LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
395 pin_ifh macro pinspec
396 bt_f_if1 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
399 pin_ifl macro pinspec
400 bt_f_if0 PORTA + (PORTB-PORTA)*((pinspec-0xa) & 15), pinspec >> 4
403 pinlat_ifh macro pinspec
404 bt_f_if1 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
407 pinlat_ifl macro pinspec
408 bt_f_if0 LATA + (LATB-LATA)*((pinspec-0xa) & 15), pinspec >> 4
411 pin_inw_ifh macro pinspec
412 bt_w_if1 pinspec >> 4
415 pin_inw_ifl macro pinspec
416 bt_w_if0 pinspec >> 4
419 ;----------------------------------------------------------------------