1 PROTOCOL BETWEEN HOST AND MASTER PIC
2 ====================================
4 9600 8N1 over the serial port. The PIC must obey the host's flow
5 control line, so that if the host gets backed up none of the PICs
6 messages can get lost. (If this is too hard, then the PIC should
7 attempt to buffer some data while the host is busy but if the PIC's
8 buffer gets too full it should panic.)
10 Each message consists of a number of 8-bit bytes. The top bit of each
11 byte is 1 iff there is another byte in the message.
13 First Second ASCII Message Brief
14 Byte byte etc. or hex name description
18 > 1 0100 TTT 0 TTTTTTT (a0) POINT Point T fire
19 > 1 1111 111 .... (ff) NMRADATA NMRA data
20 > 1 0001 XXX 0 XXXXXXX (88+) PING Ping `X' (please Pong `X')
21 > 1 0010 RRR E RRR... (90+) POLARITY Set polarity
22 > 1 0011 000 0 MMMMMMM (98+) WATCHDOG W'dog reset, t/o <M*16>ms from now
23 > 0 0010 001 (11) ON Power on
24 > 0 0010 000 (10) OFF Power off
26 ;> 00000000 CRASHED Acknowledge panic, go to readout mode
27 ;> 00001010 (0a) TELLMODE Confirm mode - say HELLO or CRASHED
28 ; if crashed, undoes the effect of ack
30 ; In crash readout mode:
32 ; 00000000 MS Select crash readout mode if not already
33 ; Reset crash readout pointer to 0
35 ; 00001000 Acknowledge RS232 framing error or overrun
38 ; 1vvvvvvv M Prepare byte 0vvvvvvv for transmission to the slave
40 ; 00000nnn M (n>0) prepare to receive nnnn bytes from slave
41 ; 0001nnnn M (n>0) transmit nnnn bytes of our own from the
44 ; 001sssss M Select slave S^0x10. Then:
46 ; Transmit just 0vvvvvvv to slave
47 ; and then send some some unspecified byte to host
49 ; Receive nnnn bytes, forwarding each one
51 ; After the transaction is complete, 1vvvvvvv
52 ; or 0000nnnn must be specified again before
53 ; 001sssss is repeated.
55 ; 01bbbbbb MS Supply 6 bits for crash readout pointer
56 ; (crash readout mode only)
57 ; Effect is FSR << 6; FSR |= bbbbbb
61 < 1 001Y SSS 0 SSSSSSS (9?) DETECT Train is (Y=1) or is not (Y=0) at S
62 < 1 0001 XXX 0 XXXXXXX (88+) PONG Pong `X' (reply to Ping `X')
63 < 1 100 0001 0 NNNNNNN (ENQ) SPURIOUS Number of spurious fault interrupts
64 < 0 000 1001 (HT) HELLO I am booted
65 < 0 000 1011 (VT) AAARGH Followed by debug chars (only)
66 < 0 000 1101 (CR) WTIMEOUT Watchdog timeout happened
67 < 0 000 0111 (BEL) FAULT Fault exists
68 < 0 000 0110 (ACK) FIXED Fault now fixed
69 < 0 0100 PPP (20+) POINTED Point change done using capacitor P
70 < 0 0101 PPP (28+) CHARGED Point capacitor P is now charged
71 < 0 00000 FF NMRADONE Have processed F NMRADATA message(s)
73 < 0000 1010 (LF) } debugging output 0x0a (newline) and
74 < 001C CCCC } (works with terminal 0x20-0x7e
75 < 01CC CCCC except 0111 1111 } emulator, or host logs) (printing ASCII)
77 (These are all shown big-endian, and all of the numerical
78 representations are big-endian too. Where a number is split across
79 two or more bytes, the relevant bits are to be concatenated, in the
80 order shown, ie bits from the MS byte first, into a larger number.)
83 HELLO, AAARGH and debugging output
84 ----------------------------------
86 When the master PIC starts up and has confirmed that all is well (all
87 of the other PICs are there, etc), it should send HELLO once.
89 If the host makes a mistake (eg, sends an unknown command, or does
90 something else wrong) or something goes horribly wrong, the master PIC
93 The PIC may always send printing ASCII characters and spaces and
94 newlines (ie, bytes 0x0a, 0x20-0x7e). These will print out nicely in
95 a terminal emulator, if that's what's running on the host. If the
96 host is running the real software, that software will put the
97 characters sent in its log or somewhere else nicely accessible.
99 Apart from debugging output, the PIC should send nothing before HELLO
100 and nothing after AAARGH.
106 The host can send ON and OFF to turn the track (and various other
107 stuff) on and off. After ON, the track power should be enabled and
108 transmitting NMRA idle, and the CDU should be enabled.
110 If the power is ON, and a track power short circuit is detected, the
111 PIC should send FAULT. When the short circuit is removed, the PIC
112 should send FIXED but not fully reenable track power; track power
113 should be reenabled when the host transmits ON.
116 Track and CDU Track and CDU
117 disabled -------ON-------> enabled
120 | |Short circuit detected
124 \__________________ V
126 fixes the short Short circuit
127 (User Fault indicator lit)
130 If OFF is issued in the first 500ms following a short circuit, it will
131 be ignored; if the short circuit persists, OFF during the following
132 period will go to the `Track and CDU disabled' state without sending
139 The ON command should cause the CDU to be enabled (and of course all
140 point motor outputs should be disabled first - see README.circuitry).
142 Following ON the host must wait until it receives CHARGED before
143 attempting to change a point. After CHARGED it may send POINT, to
144 activate the point and direction specified by T. The PICs will report
145 POINTED when the point has stopped moving, and CHARGED when the CDU is
146 ready to change another point (the host may not send POINT for a point
147 on the same CDU until then).
149 Currently there is only one CDU so P is always 0 (but the PICs need
150 not check that the received P value is 0; they may simply assume it).
153 ----ON-----> CDU is ------CHARGED---> CDU is charged
154 charging _. and ready
161 is recharging <----POINTED---- Point is changing
164 Note that OFF will turn the CDU off, and a short circuit (FAULT) will
165 turn it off 500ms later (this delay avoids losing races where the host
166 sends a point change instruction just before a short happens).
172 The host may send PING at any time; the PIC should reply with PONG
173 with the same X as was in the PING message. The host may not send
174 another PING until the first one's PONG has come back.
177 POLARITY and POLARISED
178 ----------------------
180 The POLARITY command may be sent whether the track power is enabled or
181 disabled. The polarity of each segment is `unreversed' after ON; it
182 remains constant until from then on except as modified by POLARITY.
184 The command is of variable length (but at least two bytes):
186 > 1 0010 RRR E RRR... POLARITY Set polarity
188 Each byte after the first contains 7 more R bits. The first R bit
189 (most significant R bit in the first byte) corresponds to track
190 reversal segment 1; The next bit (2nd most significant bit in the
191 first byte) corresponds to track reversal segment 2; and so on.
193 Bits which do not correspond to defined reversal segments will be
194 ignored by the PICs. The host must send exactly as many bytes as are
195 necessary to include all of the reversal segments for each reversers
196 board (for every potential reversal segment, regardless of whether
197 that segment is a defined segment corresponding to some actual track;
198 however a board with _no_ reversers segments used does not count).
200 For example, if there are 14 reversible segments (numbered 1 to 14)
201 then the following message
202 1 0010 000 1 000 1000 0 111 1010 Actual message
203 (E RRR) (E RRR RRRR) (E RRR R---) } helpful annotations
204 1 111 1111 } and commentary
205 123 456 7890 123 4567 }
206 specifies to reverse segments 7 and 11 to 14. The trailing bits are
207 for segments 15 to 17 and are ignored. (Note that the assignment of
208 physical segments to segment numbers is complex due to bit-twiddling.
209 see detpic/reverse.asm and layout/data2safety.)
211 The PIC will reply to POLARITY with POLARISED when the polarity change
212 is complete. The host must not send another POLARITY until then.
215 NMRADATA and NMRAFULL
216 ---------------------
218 The data bits in all of the bytes of the NMRADATA command (including
219 the first) are simply transmitted as NMRA data to the track (most
220 significant bit first). The top `end of packet' bit is not
223 The first 14 data bits in the NMRA packet should be 1s. (i.e. the
224 first two complete bytes should be 11111111 11111111). Packets
225 beginning with a different first byte are reserved for other commands
226 to the PIC and the 14 idle bits are a requirement of the NMRA
229 The maximum NMRA message length is 15 bytes each carrying 7 bits of
230 actual NMRA data (i.e. 105 bits).
232 Up to three NMRADATA commands may be supplied by the host to the
233 master PIC, and their will be transmitted in sequence. After each
234 NMRADATA is completed, the PIC will send an NMRAFULL message to the
235 host. In the NMRAFULL message, F is the number of completely-received
236 NMRADATA commands awaiting transmission to the track.
238 If the PIC runs out of NMRA data, it will transmit an NMRA idle
239 stream. It is an error for the host to try to have more than three
240 outstanding NMRADATA commands.
246 The DETECT command indicates to the host whether there is currently a
247 train being detected at a specific location. The PIC must send a
248 DETECT with Y=1 when a train is detected in a location where there was
249 previously none, and with Y=0 when a train ceases to be detectable for
250 more than a small amount of time.
252 At HELLO, the host will assume that no trains are being detected.
255 RAM (data) memory map
256 =====================
258 The data memory map (for PIC18F458) looks like this:
260 0x000-0x05f Access bank RAM - RAM locations accessible via
261 access bank instructions; also form part of
263 0x060-0x0ff Remainder of RAM page 0, accessible only via correct
264 BSR setting (ie, BSR==0), INDF, etc.
266 0x100-0x1ff RAM page 1, accessible only via bank switching etc.
267 0x200-0x2ff RAM page 2, accessible only via bank switching etc.
268 0x300-0x3ff RAM page 3, accessible only via bank switching etc.
269 0x400-0x4ff RAM page 4, accessible only via bank switching etc.
270 0x500-0x5ff RAM page 5, accessible only via bank switching etc.
272 0x600-0xeff Nothing here, don't try to access.
274 0xf00-0xf5f SFR's (memory-mapped peripherals etc.) accessible
275 only via correct BSR, INDF, etc - but these are only
276 the CAN SFR's and we do not use the CAN controller.
277 0xf60-0xfff SFR's accessible via access bank (also form part
281 See common.inc for actual uses of the RAM areas.
284 Program (flash etc.) memory map
285 ===============================
287 Program memory map (for PIC18F458) looks like this:
289 0x00 0000- Program memory
290 0x00 7fff Contains actual program instructions and can also
291 contain preprogrammed data provided via special .asm
292 files. Notable contents and addresses:
293 0x00 0000 reset vector
294 0x00 0008 high-priority interrupt vector
295 0x00 0018 low-priority interrupt vector
296 See common.inc for some special tables in here, for
297 morse messages, pin/hardware-object definitions, etc.
299 0x20 0000- ID locations
300 0x20 0007 Programming which varies per PIC. Programmed by
301 idlocs*.asm which are made by make-idlocs and
302 included in perpic*.hex. Contents:
306 bits 4-0 = PIC number (guaranteed to be
307 in the range 0..31 inclusive)
309 bit 7 = 1 for the main PIC (#0)
311 bit 6 = 1 for Reversers board, 0 for Detectors
312 bits 0-5 = currently unused, set to 0
314 0x20 0002- } not currently used,
315 0x20 0007 } may contain anything
317 0x30 0000- Hardware configuration
318 0x30 000f Defines (clock source, WDT operation, etc.)
319 Probably best not to touch. `config.asm' provides
320 correct contents, which is included in *-withcfg.hex
323 0x3f fffe- Hardware device ID
324 0x3f ffff Fixed at manufacturing time; can be read to discover
325 hardware type and version (probably not very useful)
327 0xf0 0000- EEPROM data area
328 0xf0 00ff Not currently used by us
330 0x01 0000- } These locations, not listed above,
331 0x1f ffff } do not correspond to anything - there
332 0x20 0008- } is no hardware or memory in the chip
333 0x2f ffff } at these locations.
335 0x3f fffd } Accessing them isn't useful
336 0x40 0000- } and should probably be avoided.
340 (Buffer page 50 0000h reserved for NMRA) XXXX these look wrong
341 (Buffer page 40 0000h reserved for i2c) XXXX -iwj
347 (slave addresses will be 10xxxxx where xxxxx=PIC number above)