From: Ian Jackson <ijackson@chiark.greenend.org.uk>
Date: Sat, 8 Feb 2020 21:53:54 +0000 (+0000)
Subject: fairphone-battery-case: toplevels
X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ianmdlvl/git?p=reprap-play.git;a=commitdiff_plain;h=6efdf7cdafb61f9dc715f8be5c9f96f8c05cf5ea

fairphone-battery-case: toplevels

Signed-off-by: Ian Jackson <ijackson@chiark.greenend.org.uk>
---

diff --git a/Makefile b/Makefile
index c654224..1426c4b 100644
--- a/Makefile
+++ b/Makefile
@@ -19,7 +19,7 @@
 FILAMENTSPOOL_AUTOS = filamentspool filamentspool-lt filamentspool-sm
 FILAMENTSPOOL_AUTOS += filamentspool-storarm3
 
-USING_AUTOS ?= $(FILAMENTSPOOL_AUTOS) xeno-drivebay-bracket dungeonquest-cone anke-gps-bracket cable-hole-trunking-cover anglepoise-neck crossbar-computer-led-mount wardrobe-hook knifeblock pandemic-counter pattress-boxes-3-cover bike-lipo-box earring-stand bike-stalk-led-mount sewing-table sewing-table-test sewing-table-jig maglite-holder poster-tube-lid poster-tube-lid-coarse fairphone-case lock-inframe-bracket ksafe-base
+USING_AUTOS ?= $(FILAMENTSPOOL_AUTOS) xeno-drivebay-bracket dungeonquest-cone anke-gps-bracket cable-hole-trunking-cover anglepoise-neck crossbar-computer-led-mount wardrobe-hook knifeblock pandemic-counter pattress-boxes-3-cover bike-lipo-box earring-stand bike-stalk-led-mount sewing-table sewing-table-test sewing-table-jig maglite-holder poster-tube-lid poster-tube-lid-coarse fairphone-case fairphone-battery-case lock-inframe-bracket ksafe-base
 
 AUTO_INCS += sealing-box.scad sewing-table.scad \
 	     poster-tube-lid-parametric.scad
diff --git a/fairphone-battery-case.scad b/fairphone-battery-case.scad
index 06880da..1dacdf0 100644
--- a/fairphone-battery-case.scad
+++ b/fairphone-battery-case.scad
@@ -101,26 +101,26 @@ module ExtrudePlan(from,to){
   }
 }
 
-module PlanDemo(){
+module PlanDemo(){ ////toplevel
   color("blue") BaseHalfPlan();
   color("red") LidHalfPlan();
   translate([0,0,-1]) color("lightblue") SideHalfPlan();
 }
 
-module Base(){
+module Base(){ ////toplevel
   ExtrudePlan(0,s1) BaseHalfPlan();
   ExtrudePlan(s0,s1) SideHalfPlan();
 }
 
-module Lid(){
+module Lid(){ ////toplevel
   ExtrudePlan(0,s1) LidHalfPlan();
 }
 
-module Demo(){
+module Demo(){ ////toplevel
   %Base();
   Lid();
 }
 
 //PlanDemo();
-Demo();
+//Demo();
 //Base();